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-rw-r--r--src/soc/intel/common/block/cse/cse.c8
-rw-r--r--src/soc/intel/common/block/cse/cse_eop.c6
-rw-r--r--src/soc/intel/common/block/dtt/Kconfig9
-rw-r--r--src/soc/intel/common/block/dtt/dtt.c4
-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi.c9
-rw-r--r--src/soc/intel/common/block/include/intelblocks/fast_spi.h4
6 files changed, 38 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 55dd3d2da764..29a0c2192bb1 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -11,6 +11,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <intelblocks/cse.h>
+#include <intelblocks/fast_spi.h>
#include <intelblocks/me.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/post_codes.h>
@@ -1348,6 +1349,13 @@ static void cse_set_state(struct device *dev)
int send;
int result;
+
+ if (fast_spi_flash_descriptor_override()) {
+ printk(BIOS_WARNING, "HECI: not setting ME state because "
+ "flash descriptor override is enabled\n");
+ return;
+ }
+
/*
* Check if the CMOS value "me_state" exists, if it doesn't, then
* don't do anything.
diff --git a/src/soc/intel/common/block/cse/cse_eop.c b/src/soc/intel/common/block/cse/cse_eop.c
index 265fe04bbc4a..f2701d52da71 100644
--- a/src/soc/intel/common/block/cse/cse_eop.c
+++ b/src/soc/intel/common/block/cse/cse_eop.c
@@ -4,6 +4,7 @@
#include <bootstate.h>
#include <console/console.h>
#include <intelblocks/cse.h>
+#include <intelblocks/fast_spi.h>
#include <intelblocks/pmc_ipc.h>
#include <security/vboot/vboot_common.h>
#include <soc/intel/common/reset.h>
@@ -243,6 +244,11 @@ static void do_send_end_of_post(bool wait_for_completion)
return;
}
+ if (fast_spi_flash_descriptor_override()) {
+ printk(BIOS_WARNING, "CSE: not sending EOP because flash descriptor override is enabled\n");
+ return;
+ }
+
if (!eop_sent) {
set_cse_device_state(PCH_DEVFN_CSE, DEV_ACTIVE);
timestamp_add_now(TS_ME_END_OF_POST_START);
diff --git a/src/soc/intel/common/block/dtt/Kconfig b/src/soc/intel/common/block/dtt/Kconfig
index 1735c2ac21eb..fcf67888326d 100644
--- a/src/soc/intel/common/block/dtt/Kconfig
+++ b/src/soc/intel/common/block/dtt/Kconfig
@@ -7,3 +7,12 @@ config SOC_INTEL_COMMON_BLOCK_DTT
Minimal PCI Driver for enabling SSDT generation of Intel
Dynamic Tuning Technology (DTT) policies and controls, also
known as Intel DPTF (Dynamic Platform and Thermal Framework)
+
+config SOC_INTEL_COMMON_BLOCK_DTT_STATIC_ASL
+ bool
+ depends on SOC_INTEL_COMMON_BLOCK_DTT
+ default n
+ help
+ Mainboards which include `soc/intel/common/acpi/dptf/dptf.asl`
+ should select this to avoid generating a duplicate TCPU ACPI
+ device and rendering the SSDT invalid.
diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c
index b2ce8b9c41e8..1d0451fc787f 100644
--- a/src/soc/intel/common/block/dtt/dtt.c
+++ b/src/soc/intel/common/block/dtt/dtt.c
@@ -21,8 +21,8 @@ static const unsigned short pci_device_ids[] = {
static void dtt_acpi_fill_ssdt(const struct device *dev)
{
- /* Skip if DPTF driver in use since TCPU device will already exist */
- if (CONFIG(DRIVERS_INTEL_DPTF))
+ /* Skip if DPTF driver or common DPTF ASL in use since TCPU device will already exist */
+ if (CONFIG(DRIVERS_INTEL_DPTF) || CONFIG(SOC_INTEL_COMMON_BLOCK_DTT_STATIC_ASL))
return;
const char *scope = acpi_device_scope(dev);
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 45519611ab6b..8cff0707b6a7 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -472,6 +472,15 @@ void fast_spi_clear_outstanding_status(void)
write32(spibar + SPIBAR_HSFSTS_CTL, SPIBAR_HSFSTS_W1C_BITS);
}
+/* Check if flash descriptor override is asserted */
+bool fast_spi_flash_descriptor_override(void)
+{
+ void *spibar = fast_spi_get_bar();
+ uint32_t hsfsts = read32(spibar + SPIBAR_HSFSTS_CTL);
+ printk(BIOS_DEBUG, "HSFSTS: 0x%X\n", hsfsts);
+ return !(hsfsts & SPIBAR_HSFSTS_FDOPSS);
+}
+
/* As there is no official ACPI ID for this controller use the generic PNP ID for now. */
static const char *fast_spi_acpi_hid(const struct device *dev)
diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h
index 716f16a07a68..6c28f2543074 100644
--- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h
+++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h
@@ -107,5 +107,9 @@ void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf);
* Set FAST_SPIBAR BIOS Decode Lock bit
*/
void fast_spi_set_bde(void);
+/*
+ * Check if flash descriptor override is asserted
+ */
+bool fast_spi_flash_descriptor_override(void);
#endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */