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-rw-r--r--src/soc/intel/alderlake/Kconfig2
-rw-r--r--src/soc/intel/elkhartlake/Kconfig2
-rw-r--r--src/soc/intel/meteorlake/Kconfig2
-rw-r--r--src/soc/intel/tigerlake/Kconfig2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index a73657ee2c11..ca0af8a8609f 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -338,7 +338,7 @@ config VBT_DATA_SIZE_KB
# Clock divider parameters for 115200 baud rate
# Baudrate = (UART source clock * M) /(N *16)
-# ADL UART source clock: 120MHz
+# ADL UART source clock: 100MHz
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
hex
default 0x25a
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 468a0baa5764..4af32769b638 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -171,7 +171,7 @@ config CONSOLE_UART_BASE_ADDRESS
# Clock divider parameters for 115200 baud rate
# Baudrate = (UART source clock * M) /(N *16)
-# EHL UART source clock: 120MHz
+# EHL UART source clock: 100MHz
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
hex
default 0x25a
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 00519d0ecf58..67d5bc1b0695 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -238,7 +238,7 @@ config VBT_DATA_SIZE_KB
# Clock divider parameters for 115200 baud rate
# Baudrate = (UART source clock * M) /(N *16)
-# MTL UART source clock: 120MHz
+# MTL UART source clock: 100MHz
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
hex
default 0x25a
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 7966a87e3994..5b09ed706a30 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -219,7 +219,7 @@ config CONSOLE_UART_BASE_ADDRESS
# Clock divider parameters for 115200 baud rate
# Baudrate = (UART source clock * M) /(N *16)
-# TGL UART source clock: 120MHz
+# TGL UART source clock: 100MHz
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
hex
default 0x25a