diff options
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/sm.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82371eb/isa.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801dx/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82870/ioapic.c | 9 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 6 |
10 files changed, 22 insertions, 21 deletions
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c index 593f54805dea..70e49858d635 100644 --- a/src/southbridge/amd/pi/hudson/sm.c +++ b/src/southbridge/amd/pi/hudson/sm.c @@ -28,7 +28,7 @@ void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags) static void sm_init(struct device *dev) { - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static int lsmbus_recv_byte(struct device *dev) diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 69c9d44b7796..67d883ad4854 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -41,9 +41,9 @@ static void pch_enable_ioapic(struct device *dev) PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3); /* affirm full set of redirection table entries ("write once") */ - ioapic_lock_max_vectors(VIO_APIC_VADDR); + ioapic_lock_max_vectors(IO_APIC_ADDR); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void pch_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 9d03de07d740..692fd8b7005d 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -61,8 +61,8 @@ static void isa_init(struct device *dev) pci_write_config16(dev, XBCS, reg16); /* Set and verify the IOAPIC ID. */ - setup_ioapic(VIO_APIC_VADDR, ioapic_id); - if (ioapic_id != get_ioapic_id(VIO_APIC_VADDR)) + setup_ioapic(IO_APIC_ADDR, ioapic_id); + if (ioapic_id != get_ioapic_id(IO_APIC_ADDR)) die("IOAPIC error!\n"); } } diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index d914335c34be..c8b0760a27de 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -39,9 +39,9 @@ static void i82801dx_enable_ioapic(struct device *dev) pci_write_config32(dev, GEN_CNTL, reg32); printk(BIOS_DEBUG, "IOAPIC Southbridge enabled %x\n", reg32); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); - ioapic_set_boot_config(VIO_APIC_VADDR, true); + ioapic_set_boot_config(IO_APIC_ADDR, true); } static void i82801dx_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 28cde3e45af6..a04b4b99e728 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -34,7 +34,7 @@ */ static void i82801gx_enable_ioapic(struct device *dev) { - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void i82801gx_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 91b7456d54c2..0adc1b90c02a 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -34,9 +34,9 @@ static void i82801ix_enable_apic(struct device *dev) RCBA8(0x31ff); /* Lock maximum redirection entries (MRE), R/WO register. */ - ioapic_lock_max_vectors(VIO_APIC_VADDR); + ioapic_lock_max_vectors(IO_APIC_ADDR); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void i82801ix_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 7cff33a26131..0a3e26f2788c 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -35,9 +35,9 @@ static void i82801jx_enable_apic(struct device *dev) RCBA8(0x31ff); /* Lock maximum redirection entries (MRE), R/WO register. */ - ioapic_lock_max_vectors(VIO_APIC_VADDR); + ioapic_lock_max_vectors(IO_APIC_ADDR); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void i82801jx_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c index f6a4ac0b3e76..4a25f6b951ae 100644 --- a/src/southbridge/intel/i82870/ioapic.c +++ b/src/southbridge/intel/i82870/ioapic.c @@ -6,6 +6,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <assert.h> +#include <types.h> #include "82870.h" static void p64h2_ioapic_enable(struct device *dev) @@ -27,17 +28,17 @@ static void p64h2_ioapic_enable(struct device *dev) */ static void p64h2_ioapic_init(struct device *dev) { - uint32_t memoryBase; + uintptr_t memoryBase; // Read the MBAR address for setting up the IOAPIC in memory space // NOTE: this address was assigned during enumeration of the bus - memoryBase = pci_read_config32(dev, PCI_BASE_ADDRESS_0); + memoryBase = (uintptr_t)pci_read_config32(dev, PCI_BASE_ADDRESS_0); - register_new_ioapic((void *)memoryBase); + register_new_ioapic(memoryBase); // Use Processor System Bus to deliver interrupts - ioapic_set_boot_config((void *)memoryBase, true); + ioapic_set_boot_config(memoryBase, true); } static struct device_operations ioapic_ops = { diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 7d85883bd95e..93dc387124ab 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -33,9 +33,9 @@ static void pch_enable_ioapic(struct device *dev) { /* affirm full set of redirection table entries ("write once") */ - ioapic_lock_max_vectors(VIO_APIC_VADDR); + ioapic_lock_max_vectors(IO_APIC_ADDR); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void pch_enable_serial_irqs(struct device *dev) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index e44d9a8d174a..93b74233f721 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -38,11 +38,11 @@ static void pch_enable_ioapic(struct device *dev) /* affirm full set of redirection table entries ("write once") */ /* PCH-LP has 40 redirection entries */ if (pch_is_lp()) - ioapic_set_max_vectors(VIO_APIC_VADDR, 40); + ioapic_set_max_vectors(IO_APIC_ADDR, 40); else - ioapic_lock_max_vectors(VIO_APIC_VADDR); + ioapic_lock_max_vectors(IO_APIC_ADDR); - register_new_ioapic_gsi0(VIO_APIC_VADDR); + register_new_ioapic_gsi0(IO_APIC_ADDR); } static void pch_enable_serial_irqs(struct device *dev) |