1 files changed, 0 insertions, 56 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
index 00024e2fa417..724202b66339 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mndct.c
@@ -1933,62 +1933,6 @@ MemNChangeFrequencyUnb (
   }
 }
 
-
-/* -----------------------------------------------------------------------------*/
-/**
- *
- *  This function calculates and programs NB P-state dependent registers
- *
- *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
- *
- */
-
-VOID
-MemNProgramNbPstateDependentRegistersUnb (
-  IN OUT   MEM_NB_BLOCK *NBPtr
-  )
-{
-  UINT8 RdPtrInit;
-  UINT8 Dct;
-
-  RdPtrInit = (NBPtr->DCTPtr->Timings.Speed <= DDR1600_FREQUENCY) ? 6 : 5;
-  MemNBrdcstSetNb (NBPtr, BFRdPtrInit, RdPtrInit);
-  IDS_HDT_CONSOLE (MEM_FLOW, "\t\tRdPtr: %d\n", RdPtrInit);
-
-  switch (RdPtrInit) {
-  case 4:
-    if (MemNGetBitFieldNb (NBPtr, BFNbPsSel) == 0) {
-      MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 2);
-    } else {
-      MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
-    }
-    break;
-  case 5:
-    MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 1);
-    break;
-  case 6:
-    MemNBrdcstSetNb (NBPtr, BFDataTxFifoWrDly, 0);
-    break;
-  default:
-    ASSERT (FALSE);
-  }
-
-  for (Dct = 0; Dct < NBPtr->DctCount; Dct++) {
-    MemNSwitchDCTNb (NBPtr, Dct);
-    if (NBPtr->DCTPtr->Timings.DctMemSize != 0) {
-      // Set ProcOdtAdv
-      if (NBPtr->DCTPtr->Timings.Speed <= DDR1333_FREQUENCY) {
-        MemNSetBitFieldNb (NBPtr, BFProcOdtAdv, 0);
-      } else {
-        MemNSetBitFieldNb (NBPtr, BFProcOdtAdv, 0x4000);
-      }
-    }
-  }
-
-  NBPtr->FamilySpecificHook[OverrideDataTxFifoWrDly] (NBPtr, NBPtr);
-  IDS_OPTION_HOOK (IDS_NBPS_REG_OVERRIDE, NBPtr, &NBPtr->MemPtr->StdHeader);
-}
-
 /* -----------------------------------------------------------------------------*/
 CONST UINT8 PllDivTab[] = {0, 0, 0, 2, 3, 3, 2, 3};
 CONST UINT8 PllMultTab[] = {0, 0, 0, 16, 32, 40, 32, 56};