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-rw-r--r--src/vendorcode/amd/agesa/f15/Include/Ids.h2
-rw-r--r--src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h24
-rw-r--r--src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h46
-rw-r--r--src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c4
-rw-r--r--src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c12
-rw-r--r--src/vendorcode/amd/agesa/f15/Makefile.inc7
-rw-r--r--src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c14
7 files changed, 58 insertions, 51 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Include/Ids.h b/src/vendorcode/amd/agesa/f15/Include/Ids.h
index b8d50919be0d..07ceeaf60314 100644
--- a/src/vendorcode/amd/agesa/f15/Include/Ids.h
+++ b/src/vendorcode/amd/agesa/f15/Include/Ids.h
@@ -615,7 +615,7 @@ typedef enum { //vv- for debug reference only
/// Function entry for HDT script to call
typedef struct _SCRIPT_FUNCTION {
- UINT32 FuncAddr; ///< Function address in ROM
+ UINTN FuncAddr; ///< Function address in ROM
CHAR8 FuncName[40]; ///< Function name
} SCRIPT_FUNCTION;
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h
index a2c0034bd8d4..6873370a5502 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h
@@ -74,29 +74,29 @@ CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVE
#if (AGESA_ENTRY_INIT_POST == TRUE)
#include <mu.h>
CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
- { (UINT32) /*(UINT64)*/ MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"},
- { (UINT32) /*(UINT64)*/ MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"},
- { (UINT32) /*(UINT64)*/ MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"}
+ { (UINTN) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"},
+ { (UINTN) MemUReadCachelines, "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"},
+ { (UINTN) MemUFlushPattern, "FlushCl(PhyAddrLo,ClCnt)"}
};
#elif (AGESA_ENTRY_INIT_RECOVERY == TRUE)
#include <mru.h>
CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
- { (UINT32) (UINT64) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"},
- { (UINT32) (UINT64) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"},
- { (UINT32) (UINT64) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"}
+ { (UINTN) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"},
+ { (UINTN) MemRecURead1CL, "Read1Cl(BufferAddr,PhyAddrLo)"},
+ { (UINTN) MemRecUFlushPattern, "Flush1Cl(PhyAddrLo)"}
};
#else
CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
- { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"},
- { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"},
- { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"}
+ { (UINTN) CommonReturnFalse, "DefRet()"},
+ { (UINTN) CommonReturnFalse, "DefRet()"},
+ { (UINTN) CommonReturnFalse, "DefRet()"}
};
#endif
#else
CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
- { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"},
- { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"},
- { (UINT32) /*(UINT64)*/ CommonReturnFalse, "DefRet()"}
+ { (UINTN) CommonReturnFalse, "DefRet()"},
+ { (UINTN) CommonReturnFalse, "DefRet()"},
+ { (UINTN) CommonReturnFalse, "DefRet()"}
};
#endif
diff --git a/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h
index 7d90f8bb5a8b..9ae45c3ee209 100644
--- a/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h
+++ b/src/vendorcode/amd/agesa/f15/Include/gcc-intrin.h
@@ -27,11 +27,11 @@
*/
#if defined (__GNUC__)
-
+#include <stdint.h>
/* I/O intrin functions. */
-static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port)
{
- unsigned char value;
+ uint8_t value;
__asm__ __volatile__ (
"in %1, %0"
@@ -42,9 +42,9 @@ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port)
{
- unsigned short value;
+ uint16_t value;
__asm__ __volatile__ (
"in %1, %0"
@@ -55,9 +55,9 @@ static __inline__ __attribute__((always_inline)) unsigned short __inword(unsigne
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port)
{
- unsigned long value;
+ uint32_t value;
__asm__ __volatile__ (
"in %1, %0"
@@ -68,7 +68,7 @@ static __inline__ __attribute__((always_inline)) unsigned long __indword(unsigne
}
-static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short Port,unsigned char Data)
+static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data)
{
__asm__ __volatile__ (
"out %0, %1"
@@ -77,7 +77,7 @@ static __inline__ __attribute__((always_inline)) void __outbyte(unsigned short P
);
}
-static __inline__ __attribute__((always_inline)) void __outword(unsigned short Port,unsigned short Data)
+static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data)
{
__asm__ __volatile__ (
"out %0, %1"
@@ -86,7 +86,7 @@ static __inline__ __attribute__((always_inline)) void __outword(unsigned short P
);
}
-static __inline__ __attribute__((always_inline)) void __outdword(unsigned short Port,unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data)
{
__asm__ __volatile__ (
"out %0, %1"
@@ -95,7 +95,7 @@ static __inline__ __attribute__((always_inline)) void __outdword(unsigned short
);
}
-static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; insb"
@@ -104,7 +104,7 @@ static __inline__ __attribute__((always_inline)) void __inbytestring(unsigned sh
);
}
-static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; insw"
@@ -113,7 +113,7 @@ static __inline__ __attribute__((always_inline)) void __inwordstring(unsigned sh
);
}
-static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; insl"
@@ -122,7 +122,7 @@ static __inline__ __attribute__((always_inline)) void __indwordstring(unsigned s
);
}
-static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; outsb"
@@ -131,7 +131,7 @@ static __inline__ __attribute__((always_inline)) void __outbytestring(unsigned s
);
}
-static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; outsw"
@@ -140,7 +140,7 @@ static __inline__ __attribute__((always_inline)) void __outwordstring(unsigned s
);
}
-static __inline__ __attribute__((always_inline)) void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
"rep ; outsl"
@@ -525,7 +525,7 @@ static __inline__ __attribute__((always_inline)) void __lidt(void *Source)
}
static __inline__ __attribute__((always_inline)) void
-__writefsbyte(const unsigned long Offset, const unsigned char Data)
+__writefsbyte(const unsigned long Offset, const uint8_t Data)
{
__asm__ ("movb %[Data], %%fs:%a[Offset]"
:
@@ -533,7 +533,7 @@ __writefsbyte(const unsigned long Offset, const unsigned char Data)
}
static __inline__ __attribute__((always_inline)) void
-__writefsword(const unsigned long Offset, const unsigned short Data)
+__writefsword(const unsigned long Offset, const uint16_t Data)
{
__asm__ ("movw %[Data], %%fs:%a[Offset]"
:
@@ -541,14 +541,14 @@ __writefsword(const unsigned long Offset, const unsigned short Data)
}
static __inline__ __attribute__((always_inline)) void
-__writefsdword(const unsigned long Offset, const unsigned long Data)
+__writefsdword(const unsigned long Offset, const uint32_t Data)
{
__asm__ ("movl %[Data], %%fs:%a[Offset]"
:
: [Offset] "ir" (Offset), [Data] "ir" (Data));
}
-static __inline__ __attribute__((always_inline)) unsigned char
+static __inline__ __attribute__((always_inline)) uint8_t
__readfsbyte(const unsigned long Offset)
{
unsigned char value;
@@ -558,7 +558,7 @@ __readfsbyte(const unsigned long Offset)
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned short
+static __inline__ __attribute__((always_inline)) uint16_t
__readfsword(const unsigned long Offset)
{
unsigned short value;
@@ -568,11 +568,11 @@ __readfsword(const unsigned long Offset)
return value;
}
-static __inline__ __attribute__((always_inline)) unsigned long
+static __inline__ __attribute__((always_inline)) uint32_t
__readfsdword(unsigned long Offset)
{
unsigned long value;
- __asm__ ("movl %%fs:%a[Offset], %[value]"
+ __asm__ ("mov %%fs:%a[Offset], %[value]"
: [value] "=r" (value)
: [Offset] "ir" (Offset));
return value;
diff --git a/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c
index ae25a49dd971..4353c41c3eec 100644
--- a/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c
+++ b/src/vendorcode/amd/agesa/f15/Legacy/Proc/Dispatcher.c
@@ -83,8 +83,8 @@ AmdAgesaDispatcher (
IMAGE_ENTRY ImageEntry;
MODULE_ENTRY ModuleEntry;
DISPATCH_TABLE *Entry;
- UINT32 ImageStart;
- UINT32 ImageEnd;
+ UINTN ImageStart;
+ UINTN ImageEnd;
AMD_IMAGE_HEADER* AltImagePtr;
Status = AGESA_UNSUPPORTED;
diff --git a/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c
index b2accb2aaf97..aa7c1b87b791 100644
--- a/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c
+++ b/src/vendorcode/amd/agesa/f15/Legacy/Proc/hobTransfer.c
@@ -148,7 +148,7 @@ CopyHeapToTempRamAtPost (
//
// 0xC0000 ~ 0xFFFFF
//
- HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + (((AmdHeapRamAddress >> 16) & 0x3) * 2));
+ HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX4k_C0000 + ((((UINTN)AmdHeapRamAddress >> 16) & 0x3) * 2));
MsrData = AMD_MTRR_FIX4K_UC_DRAM;
LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader);
LibAmdMsrWrite ((HeapRamFixMtrr + 1), &MsrData, StdHeader);
@@ -156,7 +156,7 @@ CopyHeapToTempRamAtPost (
//
// 0x80000~0xBFFFF
//
- HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + ((AmdHeapRamAddress >> 17) & 0x1));
+ HeapRamFixMtrr = (UINT32) (AMD_MTRR_FIX16k_80000 + (((UINTN)AmdHeapRamAddress >> 17) & 0x1));
MsrData = AMD_MTRR_FIX16K_UC_DRAM;
LibAmdMsrWrite (HeapRamFixMtrr, &MsrData, StdHeader);
} else {
@@ -165,7 +165,7 @@ CopyHeapToTempRamAtPost (
//
LibAmdMsrRead (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader);
MsrData = MsrData & (~(0xFF << (8 * ((AmdHeapRamAddress >> 16) & 0x7))));
- MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * ((AmdHeapRamAddress >> 16) & 0x7)));
+ MsrData = MsrData | (AMD_MTRR_FIX64K_UC_DRAM << (8 * (((UINTN)AmdHeapRamAddress >> 16) & 0x7)));
LibAmdMsrWrite (AMD_MTRR_FIX64k_00000, &MsrData, StdHeader);
}
@@ -209,7 +209,7 @@ CopyHeapToTempRamAtPost (
TotalSize = sizeof (HEAP_MANAGER);
SizeOfNodeData = 0;
AlignTo16ByteInTempMem = 0;
- BaseAddressInCache = (UINT8 *) (UINT32)StdHeader->HeapBasePtr;
+ BaseAddressInCache = (UINT8 *) (UINTN)StdHeader->HeapBasePtr;
HeapManagerInCache = (HEAP_MANAGER *) BaseAddressInCache;
HeapInCacheOffset = HeapManagerInCache->FirstActiveBufferOffset;
HeapInCache = (BUFFER_NODE *) (BaseAddressInCache + HeapInCacheOffset);
@@ -308,8 +308,8 @@ CopyHeapToMainRamAtPost (
TotalSize = sizeof (HEAP_MANAGER);
SizeOfNodeData = 0;
AlignTo16ByteInMainMem = 0;
- BaseAddressInTempMem = (UINT8 *)(UINT32) StdHeader->HeapBasePtr;
- HeapManagerInTempMem = (HEAP_MANAGER *)(UINT32) StdHeader->HeapBasePtr;
+ BaseAddressInTempMem = (UINT8 *)(UINTN) StdHeader->HeapBasePtr;
+ HeapManagerInTempMem = (HEAP_MANAGER *)(UINTN) StdHeader->HeapBasePtr;
HeapInTempMemOffset = HeapManagerInTempMem->FirstActiveBufferOffset;
HeapInTempMem = (BUFFER_NODE *) (BaseAddressInTempMem + HeapInTempMemOffset);
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index 94e3e434c1f7..88870b9541cc 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -59,15 +59,22 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/Recovery/Mem
## AGESA need sse feature ##
CFLAGS_x86_32 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
+CFLAGS_x86_64 += -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC)
CPPFLAGS_x86_32 += $(AGESA_INC)
+CPPFLAGS_x86_64 += $(AGESA_INC)
+
#######################################################################
classes-y += libagesa
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
$(eval $(call create_class_compiler,libagesa,x86_32))
+else
+$(eval $(call create_class_compiler,libagesa,x86_64))
+endif
libagesa-y += Legacy/Proc/agesaCallouts.c
libagesa-y += Legacy/Proc/Dispatcher.c
diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c
index f42c35da0893..5698fb36eba1 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/heapManager.c
@@ -156,7 +156,7 @@ HeapManagerInit (
GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader);
- HeapBufferPtr = (UINT8 *)(UINT32) StdHeader->HeapBasePtr;
+ HeapBufferPtr = (UINT8 *)(UINTN) StdHeader->HeapBasePtr;
// Check whether the heap manager is already initialized
LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader);
@@ -326,14 +326,14 @@ HeapAllocateBuffer (
// Check Heap database is valid
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// The base address in StdHeader is incorrect, get base address by itself
- BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader);
+ BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader);
HeapManager = (HEAP_MANAGER *) BaseAddress;
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// Heap is not available, ASSERT here
ASSERT (FALSE);
return AGESA_ERROR;
}
- StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress;
+ StdHeader->HeapBasePtr = (UINTN)BaseAddress;
}
// Allocate
@@ -471,14 +471,14 @@ HeapDeallocateBuffer (
// Check Heap database is valid
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// The base address in StdHeader is incorrect, get base address by itself
- BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader);
+ BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader);
HeapManager = (HEAP_MANAGER *) BaseAddress;
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// Heap is not available, ASSERT here
ASSERT (FALSE);
return AGESA_ERROR;
}
- StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress;
+ StdHeader->HeapBasePtr = (UINTN)BaseAddress;
}
OffsetOfPreviousNode = AMD_HEAP_INVALID_HEAP_OFFSET;
@@ -600,14 +600,14 @@ HeapLocateBuffer (
// Check Heap database is valid
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// The base address in StdHeader is incorrect, get base address by itself
- BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader);
+ BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader);
HeapManager = (HEAP_MANAGER *) BaseAddress;
if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) {
// Heap is not available, ASSERT here
ASSERT (FALSE);
return AGESA_ERROR;
}
- StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress;
+ StdHeader->HeapBasePtr = (UINTN)BaseAddress;
}
OffsetOfCurrentNode = HeapManager->FirstActiveBufferOffset;
CurrentNode = (BUFFER_NODE *) (BaseAddress + OffsetOfCurrentNode);
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 06:27:04 +0000