summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/drivers/net/Kconfig10
-rw-r--r--src/drivers/net/r8168.c34
-rw-r--r--src/ec/intel/board_id.c49
-rw-r--r--src/mainboard/asus/p8x7x-series/Kconfig1
-rw-r--r--src/mainboard/google/dedede/variants/beadrix/memory/Makefile.mk1
-rw-r--r--src/mainboard/google/dedede/variants/beadrix/memory/dram_id.generated.txt1
-rw-r--r--src/mainboard/google/dedede/variants/beadrix/memory/mem_parts_used.txt1
7 files changed, 77 insertions, 20 deletions
diff --git a/src/drivers/net/Kconfig b/src/drivers/net/Kconfig
index 8e087f7f6d49..b8e5812b714a 100644
--- a/src/drivers/net/Kconfig
+++ b/src/drivers/net/Kconfig
@@ -16,6 +16,16 @@ config REALTEK_8168_MACADDRESS
hexadecimal number for it to be valid. Failing to do so will
result in the default macaddress being used.
+config RT8168_PUT_MAC_TO_ERI
+ bool
+ help
+ After programming MAC address into the regular rt8168 ID registers,
+ also program it into ERI. On some mainboards our programmed
+ MAC address will not survive a controller reset without this step.
+
+ Select at mainboard level only if its rt8168 has no EEPROM and
+ programmed MAC address is lost after booting to OS.
+
config RT8168_GET_MAC_FROM_VPD
bool
default n
diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c
index 6d93ed2dd741..8ef2ee8148e7 100644
--- a/src/drivers/net/r8168.c
+++ b/src/drivers/net/r8168.c
@@ -37,6 +37,8 @@
#define CFG_9346_UNLOCK 0xc0
#define CMD_REG_ASPM 0xb0
#define ASPM_L1_2_MASK 0xe059000f
+#define ERIDR 0x70
+#define ERIAR 0x74
#define DEVICE_INDEX_BYTE 12
#define MAX_DEVICE_SUPPORT 10
@@ -200,6 +202,7 @@ static void get_mac_address(u8 *macaddr, const u8 *strbuf)
static void program_mac_address(struct device *dev, u16 io_base)
{
u8 macstrbuf[MACLEN] = { 0 };
+ u32 maclo, machi;
int i = 0;
/* Default MAC Address of 00:E0:4C:00:C0:B0 */
u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 };
@@ -234,11 +237,36 @@ static void program_mac_address(struct device *dev, u16 io_base)
outb(CFG_9346_UNLOCK, io_base + CFG_9346);
/* Set MAC address: only 4-byte write accesses allowed */
- outl(mac[4] | mac[5] << 8, io_base + 4);
+ maclo = mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24;
+ machi = mac[4] | mac[5] << 8;
+ outl(machi, io_base + 4);
inl(io_base + 4);
- outl(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24,
- io_base);
+ outl(maclo, io_base);
inl(io_base);
+ /* Some boards (e.g. asus/p8z77-v_le_plus) need the MAC address set here too */
+ if (CONFIG(RT8168_PUT_MAC_TO_ERI)) {
+ switch (pci_read_config8(dev, PCI_REVISION_ID)) {
+ case 6:
+ outl((maclo & 0xffff) << 16, io_base + ERIDR);
+ inl(io_base + ERIDR);
+ outl(0x8000f0f0, io_base + ERIAR);
+ inl(io_base + ERIAR);
+ outl((machi << 16 | maclo >> 16), io_base + ERIDR);
+ inl(io_base + ERIDR);
+ outl(0x8000f0f4, io_base + ERIAR);
+ break;
+ case 9:
+ outl(maclo, io_base + ERIDR);
+ inl(io_base + ERIDR);
+ outl(0x8000f0e0, io_base + ERIAR);
+ inl(io_base + ERIAR);
+ outl(machi, io_base + ERIDR);
+ inl(io_base + ERIDR);
+ outl(0x800030e4, io_base + ERIAR);
+ break;
+ }
+ udelay(1000);
+ }
/* Lock config regs */
outb(CFG_9346_LOCK, io_base + CFG_9346);
diff --git a/src/ec/intel/board_id.c b/src/ec/intel/board_id.c
index 72d74c51f0d8..028c4e103e72 100644
--- a/src/ec/intel/board_id.c
+++ b/src/ec/intel/board_id.c
@@ -2,32 +2,47 @@
#include <boardid.h>
#include "board_id.h"
+#include <console/console.h>
#include <ec/acpi/ec.h>
#include <ec/google/chromeec/ec.h>
#include <types.h>
-static uint32_t get_board_id_via_ext_ec(void)
+static int intel_ec_get_board_version(uint32_t *id)
{
- uint32_t id = BOARD_ID_INIT;
+ if (send_ec_command(EC_FAB_ID_CMD))
+ return -1;
- if (google_chromeec_get_board_version(&id))
- id = BOARD_ID_UNKNOWN;
-
- return id;
+ *id = recv_ec_data() << 8 | recv_ec_data();
+ return 0;
}
-/* Get Board ID via EC I/O port write/read */
+/* Read Board ID from EC */
int get_rvp_board_id(void)
{
- static int id = BOARD_ID_UNKNOWN;
-
- if (CONFIG(EC_GOOGLE_CHROMEEC)) { /* CHROME_EC */
- id = get_board_id_via_ext_ec();
- } else { /* WINDOWS_EC */
- if (send_ec_command(EC_FAB_ID_CMD) == 0) {
- id = recv_ec_data() << 8;
- id |= recv_ec_data();
- }
+ static uint32_t id = BOARD_ID_INIT;
+ const char *ec_type;
+ int ret;
+
+ /* If already initialized, return the cached board ID. */
+ if (id != BOARD_ID_INIT)
+ return id;
+
+ /* Reading board ID. */
+ if (CONFIG(EC_GOOGLE_CHROMEEC)) { /* Chrome EC */
+ ec_type = "ChromeEC";
+ ret = google_chromeec_get_board_version(&id);
+ } else { /* Intel EC */
+ ec_type = "IntelEC";
+ ret = intel_ec_get_board_version(&id);
}
- return (id & BOARD_ID_MASK);
+
+ if (ret == -1) {
+ id = BOARD_ID_UNKNOWN;
+ printk(BIOS_INFO, "[%s] board id: unknown\n", ec_type);
+ } else {
+ id &= BOARD_ID_MASK;
+ printk(BIOS_INFO, "[%s] board id: 0x%x\n", ec_type, id);
+ }
+
+ return id;
}
diff --git a/src/mainboard/asus/p8x7x-series/Kconfig b/src/mainboard/asus/p8x7x-series/Kconfig
index e3e977f00e25..112d861f9430 100644
--- a/src/mainboard/asus/p8x7x-series/Kconfig
+++ b/src/mainboard/asus/p8x7x-series/Kconfig
@@ -62,6 +62,7 @@ config BOARD_ASUS_P8Z77_V_LE_PLUS
select BOARD_ASUS_P8X7X_SERIES
select BOARD_ROMSIZE_KB_8192
select RT8168_SET_LED_MODE
+ select RT8168_PUT_MAC_TO_ERI
select SUPERIO_NUVOTON_NCT6779D
select USE_NATIVE_RAMINIT
select POWER_LED_USES_GPIO8
diff --git a/src/mainboard/google/dedede/variants/beadrix/memory/Makefile.mk b/src/mainboard/google/dedede/variants/beadrix/memory/Makefile.mk
index d260b55866c0..74955edb8de5 100644
--- a/src/mainboard/google/dedede/variants/beadrix/memory/Makefile.mk
+++ b/src/mainboard/google/dedede/variants/beadrix/memory/Makefile.mk
@@ -6,3 +6,4 @@
SPD_SOURCES =
SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D1NP-046 WT:B, K4U6E3S4AA-MGCR, H54G46CYRBX267
SPD_SOURCES += spd/lp4x/set-1/spd-11.hex # ID = 1(0b0001) Parts = CXDB4CBAM-ML-A
+SPD_SOURCES += spd/lp4x/set-1/spd-5.hex # ID = 2(0b0010) Parts = SDVB8D8A34XGCL3N3T
diff --git a/src/mainboard/google/dedede/variants/beadrix/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/beadrix/memory/dram_id.generated.txt
index ddbed1a22d29..080e808939f5 100644
--- a/src/mainboard/google/dedede/variants/beadrix/memory/dram_id.generated.txt
+++ b/src/mainboard/google/dedede/variants/beadrix/memory/dram_id.generated.txt
@@ -8,3 +8,4 @@ MT53E512M32D1NP-046 WT:B 0 (0000)
K4U6E3S4AA-MGCR 0 (0000)
H54G46CYRBX267 0 (0000)
CXDB4CBAM-ML-A 1 (0001)
+SDVB8D8A34XGCL3N3T 2 (0010)
diff --git a/src/mainboard/google/dedede/variants/beadrix/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/beadrix/memory/mem_parts_used.txt
index 56e9d6e249e0..d95fdb6cd531 100644
--- a/src/mainboard/google/dedede/variants/beadrix/memory/mem_parts_used.txt
+++ b/src/mainboard/google/dedede/variants/beadrix/memory/mem_parts_used.txt
@@ -13,3 +13,4 @@ MT53E512M32D1NP-046 WT:B
K4U6E3S4AA-MGCR
H54G46CYRBX267
CXDB4CBAM-ML-A
+SDVB8D8A34XGCL3N3T
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-30 05:26:10 +0000