summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/Kconfig5
-rw-r--r--src/mainboard/google/brya/Makefile.inc2
-rw-r--r--src/mainboard/google/brya/spd/Makefile.inc11
-rw-r--r--src/mainboard/google/brya/variants/brya0/memory/Makefile.inc5
-rw-r--r--src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt2
-rw-r--r--src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt1
6 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 4f1854c4eab4..d210b4dceebf 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -10,6 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select EC_GOOGLE_CHROMEEC_ESPI
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
+ select HAVE_SPD_IN_CBFS
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS
select SOC_INTEL_ALDERLAKE
@@ -47,6 +48,10 @@ config VARIANT_DIR
string
default "brya0" if BOARD_GOOGLE_BRYA0
+config DIMM_SPD_SIZE
+ int
+ default 512
+
config UART_FOR_CONSOLE
int
default 0
diff --git a/src/mainboard/google/brya/Makefile.inc b/src/mainboard/google/brya/Makefile.inc
index a7bc42587c1e..0686a3018b76 100644
--- a/src/mainboard/google/brya/Makefile.inc
+++ b/src/mainboard/google/brya/Makefile.inc
@@ -13,6 +13,8 @@ VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
subdirs-y += variants/baseboard
subdirs-y += variants/$(VARIANT_DIR)
+subdirs-y += variants/$(VARIANT_DIR)/memory
+subdirs-y += spd
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
diff --git a/src/mainboard/google/brya/spd/Makefile.inc b/src/mainboard/google/brya/spd/Makefile.inc
new file mode 100644
index 000000000000..e7a1c5d516e5
--- /dev/null
+++ b/src/mainboard/google/brya/spd/Makefile.inc
@@ -0,0 +1,11 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+##
+
+ifneq ($(SPD_SOURCES),)
+ifeq ($(SPD_SOURCE_PATH),)
+SPD_SOURCE_PATH := src/soc/intel/alderlake/spd
+endif
+
+LIB_SPD_DEPS := $(foreach f, $(SPD_SOURCES), $(SPD_SOURCE_PATH)/$(f))
+
+endif
diff --git a/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
new file mode 100644
index 000000000000..03a38b2fc05f
--- /dev/null
+++ b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+## This is an auto-generated file. Do not edit!!
+
+SPD_SOURCES =
+SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F
diff --git a/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
new file mode 100644
index 000000000000..93934ae8bd34
--- /dev/null
+++ b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
@@ -0,0 +1,2 @@
+DRAM Part Name ID to assign
+MT53E512M32D2NP-046 WT:F 0 (0000)
diff --git a/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
new file mode 100644
index 000000000000..fb014a3bd364
--- /dev/null
+++ b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
@@ -0,0 +1 @@
+MT53E512M32D2NP-046 WT:F