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* lib/edid_fill_fb: Support multiple framebuffersPatrick Rudolph2020-12-104-53/+174
* drivers/genesyslogic/gl9755: Adjust L1 exit latency to enable ASPMDuncan Laurie2020-12-102-4/+21
* drivers/intel/fsp1_1/cache_as_ram.S: Correct commentFrans Hendriks2020-12-101-1/+1
* mb/google/zork: Remove unsused codeMathew King2020-12-104-38/+0
* mb/google/volteer: Fix a few devicetree device refsTim Wawrzynczak2020-12-102-1/+4
* soc/intel/tigerlake: Check TBT & TCSS ports for wake eventsTim Wawrzynczak2020-12-101-6/+31
* soc/intel/common: Adapt XHCI elog driver for reuseTim Wawrzynczak2020-12-1013-165/+159
* soc/intel/xeon_sp/nvs: Use common global NVSMarc Jones2020-12-104-79/+4
* sb/intel/bd82x6x: Make me_common.c a compilation unitAngel Pons2020-12-106-25/+51
* soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.hFelix Held2020-12-103-8/+3
* sb/intel/x/smbus.c: Add block read/write supportAngel Pons2020-12-105-8/+107
* sb/intel/x/smbus.c: Rename parameterAngel Pons2020-12-104-8/+8
* soc/mediatek/mt8192: Init SSPMTingHan.Shen2020-12-106-0/+52
* soc/mediatek/mt8192: Init DPMHuayang Duan2020-12-106-0/+119
* mb/intel/ehlcrb: Add EHL CRB memory initialization supportTan, Lean Sheng2020-12-106-5/+114
* mb/intel/ehlcrb: Update ehl_crb device treeTan, Lean Sheng2020-12-101-186/+101
* mb/intel/ehlcrb: Remove JSL sku id info in SMBIOSTan, Lean Sheng2020-12-101-7/+0
* mb/intel/ehlcrb: Remove IPU & MIPI related support from EHL CRBTan, Lean Sheng2020-12-103-118/+2
* mb/intel/ehlcrb: Remove board ID detection via ECTan, Lean Sheng2020-12-106-71/+1
* mb/intel/ehlcrb: Remove ChromeOS EC related headersTan, Lean Sheng2020-12-107-88/+0
* mb/intel/ehlcrb: Remove ChromeOS EC support from smihandlerTan, Lean Sheng2020-12-102-38/+0
* mb/intel/ehlcrb: Remove ChromeOS support from mainboardTan, Lean Sheng2020-12-107-98/+0
* mb/intel/ehlcrb: Add missing 'include <console/console.h>'Tan, Lean Sheng2020-12-101-0/+1
* mb/intel/ehlcrb: Add initial mainboard codeTan, Lean Sheng2020-12-1023-0/+917
* soc/intel/elkhartlake: Fix EHL mainboard build fail errorsTan, Lean Sheng2020-12-105-7/+4
* cpu/x86/64bit/exit32.inc: Don't invalidate cache in CARPatrick Rudolph2020-12-101-1/+2
* arch/x86/smbios.c: Fix compilation on x86_64Patrick Rudolph2020-12-101-1/+1
* drivers/crb/tpm: Fix compilation on x86_64Patrick Rudolph2020-12-102-3/+4
* soc/mediatek/mt8192: Load MCUPM firmware and boot up MCUPMYidi Lin2020-12-106-0/+59
* soc/mediatek/mt8192: add spmfw loaderRoger Lu2020-12-105-31/+1134
* soc/mediatek/mt8183: Use mtk_init_mcu to init SSPMYidi Lin2020-12-103-16/+23
* soc/mediatek/mt8183: Add DRAM_DMA sectionYidi Lin2020-12-102-1/+16
* soc/mediatek/common: Add common API for loading firmwaresYidi Lin2020-12-103-0/+57
* mb/supermicro/x11ssm-f: enable AER for PCIe root portsMichael Niewöhner2020-12-101-0/+5
* mb/supermicro/x11ssm-f: add subsystem ids to PCI ports and devicesMichael Niewöhner2020-12-101-2/+7
* mb/supermicro/x11ssm-f: enable LTR for all root portsMichael Niewöhner2020-12-101-0/+5
* mb/supermicro/x11-lga1151-series: drop HAVE_ACPI_RESUMEMichael Niewöhner2020-12-101-1/+0
* mb/supermicro/x11ssm-f: (re)configure unconnected padsMichael Niewöhner2020-12-101-81/+81
* mb/supermicro/x11ssm-f: (re)configure and document various padsMichael Niewöhner2020-12-101-24/+24
* soc/amd/picasso/reset: use port and bit defines from cf9_reset.hFelix Held2020-12-103-8/+3
* soc/amd/picasso/reset: remove leftover PCI includesFelix Held2020-12-101-2/+0
* Makefile.inc: Fix empty output when processing C struct files in CBFSXi Chen2020-12-091-1/+1
* mb/google/volteer/variant/volta: add Synaptics touchpad.Sheng-Liang Pan2020-12-091-0/+9
* soc/amd/cezanne: print APU family and model in bootblock_soc_initFelix Held2020-12-091-0/+3
* soc/amd/cezanne: add basic early FCH initialization to bootblockFelix Held2020-12-094-0/+28
* soc/amd/cezanne: add common SMBus code to buildFelix Held2020-12-093-0/+19
* cbfs: Allow mcache to be found after the first lookupJulius Werner2020-12-092-3/+12
* Revert "cbfs: Skip mcache in post-RAM stages before CBMEM is online"Julius Werner2020-12-091-2/+1
* soc/amd/cezanne: call bootblock_main_with_basetime in bootblock_c_entryFelix Held2020-12-091-0/+9
* soc/amd/picasso,stoneyridge: drop unused BIOSRAM offset definesFelix Held2020-12-092-10/+0