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* treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh2020-06-131-3/+3
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-4/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/arch/riscv: Convert to SPDX license headerPatrick Georgi2020-03-061-12/+1
* arch/riscv: Rename `stages.c` to `romstage.c`Nico Huber2019-11-061-1/+1
* arch/riscv: Don't link `stages.c` into ramstageNico Huber2019-11-051-1/+0
* arch/riscv: Enable FIT supportJonathan Neuschäfer2019-08-081-0/+1
* riscv: add support for OpenSBIXiang Wang2019-08-031-0/+41
* riscv: Add initial support for 32bit boardsPhilipp Hug2019-02-131-0/+12
* riscv: Simplify payload handlingXiang Wang2019-02-021-1/+1
* riscv: create Kconfig architecture features for new partsRonald G. Minnich2019-01-171-4/+15
* riscv: add support for supervisor binary interface (SBI)Xiang Wang2018-11-051-0/+2
* riscv: add support smp_pause / smp_resumeXiang Wang2018-11-051-0/+3
* riscv: add physical memory protection (PMP) supportXiang Wang2018-10-111-0/+3
* arch/riscv: Adjust compiler flags for scan-buildJonathan Neuschäfer2018-10-041-1/+6
* arch/riscv: provide a monotonic timerPhilipp Hug2018-09-141-0/+6
* riscv: update misaligned memory access exception handlingXiang Wang2018-09-101-0/+4
* riscv: add entry assembly file for RAMSTAGEXiang Wang2018-09-051-0/+4
* riscv: remove redundancy in MakefileXiang Wang2018-08-011-4/+1
* riscv: fix issues (timestrap & PRIu64)Xiang Wang2018-07-311-4/+1
* arch/riscv: Fix makefile to only set flags for riscvMartin Roth2018-07-181-3/+5
* riscv: add support for modifying compiler optionsXiang Wang2018-07-171-6/+6
* arch/riscv: Make RVC support configurableJonathan Neuschäfer2018-02-201-3/+13
* riscv: Remove config string supportJonathan Neuschäfer2017-12-021-6/+3
* arch/riscv: Remove the current SBI implementationJonathan Neuschäfer2017-12-021-1/+0
* riscv: start to use the configstring functionsRonald G. Minnich2016-11-121-3/+6
* riscv: Unify SBI call implementations under arch/riscv/Jonathan Neuschäfer2016-11-071-1/+1
* RISCV: Clean up the common architectural codeRonald G. Minnich2016-10-241-0/+1
* arch/riscv: Implement the SBI againJonathan Neuschäfer2016-08-231-0/+1
* arch/riscv: Refactor bootblock.SJonathan Neuschäfer2016-07-281-0/+3
* spike-riscv: Look for the CBFS in RAMJonathan Neuschäfer2016-07-141-3/+0
* arch/riscv: Compile with -mcmodel=medanyJonathan Neuschäfer2016-06-121-1/+4
* arch/riscv: Add misc.c to bootblock/romstage to get udelay()Jonathan Neuschäfer2016-06-121-0/+2
* build system: remove CBFSTOOL_PRE1_OPTSPatrick Georgi2016-05-031-2/+0
* Makefile: Add build-time overlap check for programs loaded after corebootJulius Werner2016-03-091-0/+4
* Makefile: Make full use of src-to-obj macroNico Huber2016-01-281-3/+3
* build system: Add more files through cbfs-files instead of manual rulesPatrick Georgi2015-12-021-1/+0
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya2015-09-161-0/+3
* riscv-trap-handling: Add implementation for trap calls in riscvThaminda Edirisooriya2015-09-101-0/+2
* linking: add and use LDFLAGS_commonAaron Durbin2015-09-091-3/+3
* riscv: Link in libgccPatrick Georgi2015-07-221-3/+3
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* build system: use archives, not linker action to shorten command linesPatrick Georgi2015-05-201-3/+3
* CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner2015-04-141-1/+1
* CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstoolJulius Werner2015-04-141-1/+1
* New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner2015-04-061-12/+6
* build system: run linker scripts through the preprocessorPatrick Georgi2015-04-061-10/+14
* build system x86: deprecate bootblock_lds and ldscripts variablesPatrick Georgi2015-04-041-1/+1
* program loading: add prog_run() functionAaron Durbin2015-04-031-0/+2
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