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* arch/riscv: Compile with -mcmodel=medanyJonathan Neuschäfer2016-06-121-1/+4
* arch/riscv: Add misc.c to bootblock/romstage to get udelay()Jonathan Neuschäfer2016-06-121-0/+2
* arch/riscv: copy read/write8/16/32 from x86Jonathan Neuschäfer2016-06-121-0/+30
* arch/riscv/trap_util.S: Use "li" pseudo-instruction to load a constantJonathan Neuschäfer2016-06-121-1/+1
* arch/x86: Support "weak" BIST and timestamp save routinesLee Leahy2016-06-112-3/+28
* arch/x86: Add debug spinloops in assembly_entry.SLee Leahy2016-06-112-0/+25
* arch/x86: Add debug spinloopLee Leahy2016-06-112-0/+16
* mainboard: Support ROM_SIZE > 16 MiBLee Leahy2016-06-091-1/+7
* arch/x86: Enable SSE in bootblock_crt0.SLee Leahy2016-06-091-6/+2
* SMBIOS: Implement SKU fieldKyösti Mälkki2016-06-021-0/+6
* acpi_device: Add support for writing ACPI Device PropertiesDuncan Laurie2016-05-282-0/+195
* acpi_device: Add support for writing ACPI SPI descriptorsDuncan Laurie2016-05-282-0/+116
* acpi_device: Add support for writing ACPI I2C descriptorsDuncan Laurie2016-05-282-0/+85
* acpi_device: Add support for writing ACPI GPIO descriptorsDuncan Laurie2016-05-282-0/+214
* acpi_device: Add support for writing ACPI Interrupt descriptorsDuncan Laurie2016-05-282-0/+135
* arch/x86: provide verstage support for CONFIG_C_ENVIRONMENT_BOOTBLOCKAaron Durbin2016-05-272-0/+27
* arm64: Add stack dump to exception handlerJulius Werner2016-05-241-10/+28
* device: Add an ACPI device name and path concept to devicesDuncan Laurie2016-05-213-0/+137
* acpigen: Add function to generate ToUUID() from a stringDuncan Laurie2016-05-212-0/+37
* arch/x86: Include timestamp.c in all stagesAlexandru Gagniuc2016-05-191-0/+2
* acpigen: Fix ?: operator confusionJonathan Neuschäfer2016-05-171-1/+1
* acpigen: Add functions to generate _STA() and _PRW()Duncan Laurie2016-05-162-0/+37
* acpigen: Add an abstracted integer output methodDuncan Laurie2016-05-162-0/+56
* acpigen: Add helper functions for stringsDuncan Laurie2016-05-162-0/+21
* acpigen: Add helpers for word/dword outputDuncan Laurie2016-05-162-33/+33
* arch/arm64: add FRAMEBUFFER region macros to memlayoutLin Huang2016-05-101-0/+5
* smbios: Add SuperTalent SPD IDTimothy Pearson2016-05-091-0/+4
* arch/armv7: Fix end index calculation in mmu_config_range_kbVaradarajan Narayanan2016-05-091-1/+7
* arch/x86: Drop CBFS_BASE_ADDRESSPatrick Georgi2016-05-031-3/+0
* build system: remove CBFSTOOL_PRE1_OPTSPatrick Georgi2016-05-036-21/+0
* arch/x86/assembly_entry: allow early post CAR stages to use common codeAaron Durbin2016-05-021-6/+20
* arch/x86/asembly_entry: reorder conditional stage entry macrosAaron Durbin2016-05-021-21/+23
* lib/coreboot_table: use the architecture dependent table sizeAaron Durbin2016-05-026-0/+12
* arch: introduce architecture dependent common variablesAaron Durbin2016-05-026-0/+156
* x86/memlayout.h: Do not include data/bss sections in C_ENVIRONMENT_BOOTBLOCKFurquan Shaikh2016-05-021-1/+1
* lib: add common write_tables() implementationAaron Durbin2016-04-216-220/+16
* lib/coreboot_table: add architecture hooks for adding tablesAaron Durbin2016-04-216-17/+39
* lib/bootmem: allow architecture specific bootmem rangesAaron Durbin2016-04-216-0/+30
* arch/x86: remove low coreboot table supportAaron Durbin2016-04-211-5/+2
* arch/x86: clean up write_tables()Aaron Durbin2016-04-211-26/+60
* arch: only print cbmem entries in one placeAaron Durbin2016-04-216-18/+0
* arch: use Kconfig variable for coreboot table sizeAaron Durbin2016-04-216-6/+7
* arch/riscv/tables: remove confusion over write_tables()Aaron Durbin2016-04-211-10/+2
* arch/power8/tables: remove confusion over write_tables()Aaron Durbin2016-04-211-11/+2
* bootblock_crt0: Use CR* macros from cpu/x86/cr.hFurquan Shaikh2016-04-151-5/+1
* Change la to li (load immediate)Ronald G. Minnich2016-04-081-2/+2
* arch/power8: Position bootblock start at reset vectorTimothy Pearson2016-04-042-2/+7
* lib/prog_loading: introduce prog_segment_loaded()Aaron Durbin2016-04-021-1/+1
* arch/x86: notify the system when the postcar parameter was updatedAaron Durbin2016-04-021-0/+7
* armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/writePaul Kocialkowski2016-03-231-15/+6
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