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* arm64: Correct shareability option for normal memoryFurquan Shaikh2015-04-222-0/+7
* google/urara: use board ID information to set up hardwareIonela Voinescu2015-04-221-1/+9
* arch/arm64: allow floating-point registers accessYen Lin2015-04-222-0/+41
* arm64: provide icache_invalidate_all()Aaron Durbin2015-04-223-3/+15
* armv7: preserve bootblock invocation parameterVadim Bendebury2015-04-212-2/+25
* Unify byte order macros and clrsetbitsJulius Werner2015-04-2114-361/+17
* arm(64): Change write32() argument order to match x86Julius Werner2015-04-215-14/+14
* arm(64): Replace write32() and friends with writel()Julius Werner2015-04-211-0/+2
* x86: Allow builds without ACPI tablesLee Leahy2015-04-211-0/+5
* arch/mips: simplify cache operationsIonela Voinescu2015-04-213-49/+35
* urara: Identity map DRAM/SRAMAndrew Bresticker2015-04-211-0/+2
* mips: Allow memory to be identity mapped in the TLBAndrew Bresticker2015-04-214-0/+240
* riscv: use new-style CBFS header lookupPatrick Georgi2015-04-182-25/+6
* armv7: set CBFS header to zeroVadim Bendebury2015-04-171-0/+2
* armv7: work around hang in bootblock startup codeDaisuke Nojiri2015-04-171-1/+1
* rk3288: Handle framebuffer through memlayout, not the resource systemJulius Werner2015-04-171-2/+9
* arch/mips: Fix bug when performing cache operationsIonela Voinescu2015-04-172-4/+20
* arm: allow custom stage entry codeDaisuke Nojiri2015-04-171-1/+4
* Kconfig: Fix incorrect CONFIG_STACK_SIZE values for X86 and ARM64Julius Werner2015-04-152-10/+0
* arm: Fix checkstack() to use correct stack sizeJulius Werner2015-04-142-0/+10
* rk3288: Add CBMEM console support and fix RETURN_FROM_VERSTAGEJulius Werner2015-04-142-2/+2
* timer: Reestablish init_timer(), consolidate timer initialization callsJulius Werner2015-04-142-0/+12
* CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner2015-04-144-10/+4
* CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstoolJulius Werner2015-04-145-6/+12
* arch/mips: provide proper cache primitivesIonela Voinescu2015-04-135-13/+144
* mips: disable caches in bootblock startup codeVadim Bendebury2015-04-131-0/+10
* arm: Add bootblock_mainboard_early_init() for pre-console initializationJulius Werner2015-04-133-4/+11
* urara: add support for DMA coherent memory areaIonela Voinescu2015-04-131-1/+1
* arch: armv7: Fix cache sync instructions.Deepa Dinamani2015-04-131-1/+9
* arm64: No need of invalidating cache line for secondary CPU stackFurquan Shaikh2015-04-101-10/+0
* arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh2015-04-108-61/+201
* arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh2015-04-101-0/+15
* arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh2015-04-101-0/+25
* arm64: Add function for reading TCR register at current ELFurquan Shaikh2015-04-102-0/+32
* arm64: psci: actually inform SoC layer of CPU_ON entryAaron Durbin2015-04-101-0/+3
* arm64: ensure secondary CPU's stack tops are not in the cacheAaron Durbin2015-04-101-0/+12
* arm64: add timeout waiting for CPUs to come onlineAaron Durbin2015-04-101-2/+18
* x86: Support reset routines in bootblockLee Leahy2015-04-102-0/+7
* build system: Fix SeaBIOS integration with multilib compilersPatrick Georgi2015-04-101-1/+3
* arm64: Implement PSCI command supportAaron Durbin2015-04-102-10/+101
* arm64: secmon: add entry point for turned on CPUsAaron Durbin2015-04-107-36/+113
* arm64: secmon: pass online CPUs to secmonAaron Durbin2015-04-105-16/+23
* arm64: psci: use struct cpu_action to track startup entryAaron Durbin2015-04-103-13/+19
* arm64: secmon: prepare for passing more state into secmonAaron Durbin2015-04-103-30/+39
* arm64: secmon: wait for all CPUs to enter secmonAaron Durbin2015-04-101-0/+21
* armv7-m: set stack pointer to _estackDaisuke Nojiri2015-04-101-0/+15
* armv7-m: add bootblock entry pointDaisuke Nojiri2015-04-102-0/+36
* armv7-m: add empty cache routinesDaisuke Nojiri2015-04-102-1/+81
* armv7-m: add armv7-m configurationDaisuke Nojiri2015-04-104-22/+78
* arm64: secmon: direct non-BSP cpus to start before BSPAaron Durbin2015-04-091-1/+4