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* arch: Unify basic cache clearing APIJulius Werner2017-05-304-0/+107
* arch/x86: Add function to determine if we're currently running from CARJulius Werner2017-05-301-0/+9
* arm64: Align cache maintenance code with libpayload and ARM32Julius Werner2017-05-307-193/+88
* CBMEM: Clarify CBMEM_TOP_BACKUP function usageKyösti Mälkki2017-05-271-13/+18
* arch/x86/include: Use IS_ENABLED() macroNico Huber2017-05-225-42/+23
* 3rdparty/arm-trusted-firmware: Update to upstream masterMartin Roth2017-05-181-1/+1
* CBMEM: Add config CBMEM_TOP_BACKUPKyösti Mälkki2017-05-182-23/+28
* arch/arm64: Use variables of the right size for msr/mrs opcodesPatrick Georgi2017-05-163-86/+84
* commonlib: Move drivers/storage into commonlib/storageLee Leahy2017-05-121-1/+1
* arch/x86: Share storage data structures between early stagesLee Leahy2017-05-011-0/+5
* arch/x86: Add read64 and write64 functionsMarshall Dawson2017-04-251-0/+16
* x86/acpigen: Fix BufferSize of ResourceTemplateNico Huber2017-04-181-1/+5
* arch/x86/acpi: Allow "transparent" ACPI device namesTimothy Pearson2017-04-171-1/+3
* arch/x86: remove CAR global migration when postcar stage is usedAaron Durbin2017-04-082-1/+2
* arch/x86/acpigen: Allow writing buffers larger than 256 bytesRizwan Qureshi2017-04-032-6/+6
* Remove libverstage as separate library and source file classJulius Werner2017-03-286-13/+5
* vboot: Move remaining features out of vendorcode/google/chromeosJulius Werner2017-03-283-3/+3
* vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig optionJulius Werner2017-03-281-2/+2
* arm64: Fix verstage to use proper assembly versions of mem*()Julius Werner2017-03-281-3/+3
* arch/x86: Fix most of remaining issues detected by checkpatchLee Leahy2017-03-2018-108/+112
* ramstage: Align stack to 16 bytesKyösti Mälkki2017-03-191-0/+2
* arch/x86: Wrap lines at 80 columnsLee Leahy2017-03-1724-180/+352
* arch/x86: Fix prefer errors detected by checkpatchLee Leahy2017-03-177-37/+38
* arch/x86: Fix space issues detected by checkpatchLee Leahy2017-03-1726-119/+127
* arch/x86: Fix issues with braces detected by checkpatchLee Leahy2017-03-1712-102/+66
* acpi_device: Add macro for GpioInt that uses both polarityDuncan Laurie2017-03-161-0/+9
* acpi_device: Prefix IRQ macros with ACPIDuncan Laurie2017-03-161-6/+6
* acpi: device: Add macro for active high level triggered IRQDuncan Laurie2017-03-151-0/+7
* acpi: Update the ACPI ID for corebootDuncan Laurie2017-03-021-4/+7
* src/arch/x86: Remove non-ascii charactersMartin Roth2017-02-241-1/+1
* arm-trusted-firmware: Disable a couple of warnings for GCC 6.2Martin Roth2017-02-241-2/+2
* arch/x86/acpigen: Provide helper functions for enabling/disabling GPIOFurquan Shaikh2017-02-223-5/+39
* acpi: Add ACPI_ prefix to IRQ enum and struct namesFurquan Shaikh2017-02-222-45/+45
* arch/x86: add functions to generate random numbersRobbie Zhang2017-02-202-0/+84
* riscv: Suppress invalid coverity errorsMartin Roth2017-02-201-0/+1
* acpi_device: Add macros for GPIO interruptsDuncan Laurie2017-02-191-4/+31
* acpi_device: Move power resource function to generic codeDuncan Laurie2017-02-192-0/+55
* spi: Add function callback to get configuration of SPI busFurquan Shaikh2017-02-161-17/+1
* src/Kconfig: Move bootblock behavior to arch/x86 as TODO suggestedMartin Roth2017-02-141-0/+26
* x86/acpi: Add VFCT tablePatrick Rudolph2017-02-042-0/+54
* build system: mark sub-make invocations as parallelizablePatrick Georgi2017-01-311-2/+2
* arch/x86: do not define type of SPIN_LOCK_UNLOCKEDPatrick Georgi2017-01-241-1/+1
* riscv: Move mcall numbers to mcall.h, adjust their namesJonathan Neuschäfer2017-01-165-46/+29
* riscv: get SBI calls to workRonald G. Minnich2017-01-165-35/+70
* arch/x86: fix cmos post logging in non romcc bootblockAaron Durbin2017-01-061-26/+0
* soc/intel/apollolake: allow ApolloLake SoC to use FSP CAR InitBrenton Dong2016-12-211-2/+3
* drivers/intel/fsp2_0: add FSP TempRamInit & TempRamExit API supportBrenton Dong2016-12-211-0/+5
* riscv: enable counters via m[us]counterenRonald G. Minnich2016-12-201-10/+8
* ACPI S3: Signal successful bootKyösti Mälkki2016-12-181-0/+3
* riscv: Add support for timer interruptsRonald G. Minnich2016-12-183-4/+94
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