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path: root/src/cpu/intel/car
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* Add option to use Ada code in romstageJeremy Compostella2022-12-171-0/+13
* cpu/intel: Fix clearing MTRR for clang 64bitArthur Heymans2022-12-163-15/+18
* cpu/intel/car: Define post codesMartin Roth2022-11-236-49/+55
* src/cpu: Remove unnecessary space after castsElyes Haouas2022-11-221-1/+1
* cpu/intel: Clean up includesElyes Haouas2022-10-261-1/+2
* cpu/intel/car/romstage.c: Clean up includes and add <types.h>Elyes Haouas2022-10-061-3/+3
* arch/x86: Mark prepare_and_run_postcar noreturnArthur Heymans2022-07-141-1/+0
* arch/x86: Add a common romstage entryArthur Heymans2022-06-071-12/+3
* arch/x86/postcar_loader.c: Change prepare_and_run_postcar signatureArthur Heymans2022-05-161-3/+1
* timestamps: Rename timestamps to make names more consistentJakub Czapiga2022-03-081-1/+1
* cpu/intel/car/core2/cache_as_ram: Add x86_64 supportPatrick Rudolph2021-07-072-5/+21
* cpu/intel/car/p4: Add x86_64 supportArthur Heymans2021-07-061-0/+11
* cpu/intel/car/p4-netburst: Prepare for x86_64Arthur Heymans2021-07-052-6/+11
* cpu/intel/car/romstage.c: Drop unused function argumentArthur Heymans2021-06-011-7/+2
* arch/x86: Move prologue to .init sectionKyösti Mälkki2021-01-074-0/+4
* cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph2020-11-022-6/+39
* cpu/intel/car/romstage.c: Remove unused <bootblock_common.h>Elyes HAOUAS2020-07-261-1/+0
* cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki2020-06-153-12/+0
* cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki2020-06-134-62/+50
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-061-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-118-8/+0
* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-048-96/+16
* cpu/intel: Remove ROMCC header guards and codeElyes HAOUAS2019-12-172-16/+0
* bootblock: Provide some common prototypesKyösti Mälkki2019-12-142-22/+1
* cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-11-251-4/+0
* Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans2019-11-253-4/+4
* cpu/intel/car: Add EC software sync to Intel romstageTim Wawrzynczak2019-11-201-0/+4
* nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-11-152-12/+0
* arch/x86/car.ld: Rename suffix _start/_endArthur Heymans2019-11-125-5/+5
* cpu/intel/car/p4-netburst: Remove delay loopsKyösti Mälkki2019-11-041-12/+0
* cpu/intel/car: Correctly cache the bootblock with C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-10-283-6/+33
* AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth2019-09-106-24/+0
* intel/car: Use common TS_START_ROMSTAGEKyösti Mälkki2019-08-261-0/+2
* lib/bootblock: Add simplified entry with basetimeKyösti Mälkki2019-08-261-1/+1
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-16/+0
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-0/+2
* cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCKArthur Heymans2019-08-211-3/+7
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-1/+1
* cpu/x86/smm: Promote smm_memory_map()Kyösti Mälkki2019-08-151-0/+4
* arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki2019-08-151-0/+2
* cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki2019-08-151-1/+17
* cpu: Add missing #include <commonlib/helpers.h>Elyes HAOUAS2019-06-211-0/+1
* cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-04-211-0/+5
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-083-5/+5
* cpu/intel/car/*/cache_as_ram.S: Add brackets around operandArthur Heymans2019-02-102-2/+2
* cpu/intel/car: Remove unneeded white spaceElyes HAOUAS2019-01-174-8/+8
* cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setupArthur Heymans2019-01-152-0/+18
* cpu/intel/car/non-evict: Update microcode in CAR setupArthur Heymans2019-01-141-7/+36
* arch/x86: Drop Kconfig AP_SIPI_VECTORKyösti Mälkki2019-01-131-2/+6
* cpu/intel/car/p4: Update microcode in CAR setupArthur Heymans2019-01-131-11/+37
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