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path: root/src/cpu/intel/haswell
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* include/device/device.h: Remove CHIP_NAME() macroNicholas Sudsgaard2024-01-311-1/+1
* cpu: Rename Makefiles from .inc to .mkMartin Roth2024-01-241-0/+0
* cpu: Add SPDX license headers to MakefilesMartin Roth2023-08-061-0/+2
* cpu: Get rid of CPU_SPECIFIC_OPTIONSElyes Haouas2023-08-041-5/+2
* cpu/intel/haswell: Add Broadwell Trad µcode updatesAngel Pons2023-05-271-0/+2
* cpu/Kconfig: Remove MMX config optionArthur Heymans2023-05-251-1/+0
* treewide: Add missing include guards to chip.hJan Samek2023-04-281-0/+5
* cpu,soc/intel: Separate single SSDT CPU entryKyösti Mälkki2023-04-171-17/+20
* cpu,soc/intel: Sync ACPI CPU object implementationsKyösti Mälkki2023-04-141-10/+6
* cpu,soc/intel: Use acpigen_write_processor_device()Elyes Haouas2023-04-141-4/+4
* arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminatorFelix Held2023-02-091-1/+1
* arch/x86/cpu: introduce and use device_match_maskFelix Held2023-02-081-12/+12
* cpu/intel/haswell: Move chip_ops to cpu clusterArthur Heymans2022-11-253-31/+15
* cpu: Include <cpu/cpu.h> instead of <arch/cpu.h>Elyes Haouas2022-11-082-5/+6
* mb/lenovo/haswell: Enable VBOOT_VBNV_FLASHYu-Ping Wu2022-10-271-1/+0
* cpu/intel/haswell: Update Broadwell ULT µcode updatesAngel Pons2022-09-201-1/+1
* cpu/intel/haswell: Hook up Crystal Well µcode updatesAngel Pons2022-09-201-0/+2
* cpu/intel/haswell: Do not include useless µcode updatesAngel Pons2022-09-201-2/+7
* cpu/intel/haswell: Allow up to six microcodes in the FIT tableJeremy Compostella2022-09-151-0/+3
* cpu: Get rid of unnecessary blank line {before,after} barceElyes HAOUAS2022-07-171-1/+0
* cpu/intel: Remove unused <acpi/acpi.h>Elyes HAOUAS2022-04-241-1/+0
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-3/+0
* cpu/intel: Use unsigned types in `get_cpu_count()`Angel Pons2021-11-051-2/+2
* cpu/x86/Kconfig.debug_cpu: drop HAVE_DISPLAY_MTRRS optionFelix Held2021-10-261-1/+0
* cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held2021-10-261-1/+0
* cpu/amd,intel/*/Makefile: don't add cpu/x86/cacheFelix Held2021-10-261-1/+0
* cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held2021-10-251-1/+0
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-221-2/+2
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-211-1/+2
* cpu/intel/haswell: Lock PKG_CST_CONFIG_CONTROL MSRAngel Pons2021-10-151-0/+1
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-081-1/+0
* src: use mca_clear_status function instead of open codingFelix Held2021-07-141-3/+1
* cpu/intel/*/*_init: use mca_get_bank_count()Felix Held2021-07-141-4/+1
* include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held2021-07-141-2/+2
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* cpu/intel/haswell: Select `HAVE_DISPLAY_MTRRS`Angel Pons2021-06-161-0/+1
* cpu/intel/haswell: Enable MCA loggingAngel Pons2021-06-161-0/+6
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* cpu/intel/haswell/acpi.c: Do not report P_BLKAngel Pons2021-06-071-8/+2
* Add Kconfig TPMKyösti Mälkki2021-05-261-1/+1
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-181-1/+0
* cpu/intel/haswell: Use new fixed BAR accessorsAngel Pons2021-04-101-16/+16
* cpu/intel/haswell: Constify ACPI c-state arraysAngel Pons2021-02-141-4/+4
* cpu/intel/haswell: Drop c-state table indirectionAngel Pons2021-02-142-96/+88
* cpu/intel/haswell/acpi.c: Correct `get_cores_per_package`Angel Pons2021-02-121-14/+4
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-112-2/+1
* soc/intel/broadwell: Move romstage.c to HaswellAngel Pons2021-01-242-0/+32
* soc/intel/broadwell: Use Haswell CPU headersAngel Pons2021-01-241-0/+7
* cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons2021-01-242-0/+8
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