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* intel/smm: Provide common smm_relocation_paramsKyösti Mälkki2019-11-221-42/+0
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-1/+0
* cpu/x86: make set_msr_bit publicly availableMichael Niewöhner2019-10-311-19/+0
* cpu/intel/common: Move intel_ht_sibling() to common folderPatrick Rudolph2019-10-011-1/+0
* cpu/intel: Use CPU_INTEL_COMMON_TIMEBASEKyösti Mälkki2019-09-243-33/+1
* cpu/intel/microcode: Make microcode lib available in bootblockRizwan Qureshi2019-09-151-1/+0
* intel/haswell: Remove some __PRE_RAM__ useKyösti Mälkki2019-09-131-11/+1
* AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth2019-09-109-20/+0
* intel/haswell: Use smm_subregion()Kyösti Mälkki2019-08-281-37/+13
* intel/haswell,broadwell: Rename EMRR to PRMRRKyösti Mälkki2019-08-281-41/+41
* devicetree: Remove duplicate chip_ops declarationsKyösti Mälkki2019-08-201-2/+0
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-182-6/+1
* soc/intel: Rename some SMM support functionsKyösti Mälkki2019-08-153-9/+4
* cpu/intel: Replace bsp_init_and_start_aps()Kyösti Mälkki2019-08-152-3/+1
* cpu/x86: Separate save_state struct headersKyösti Mälkki2019-08-131-0/+1
* intel/haswell: Move platform_enter_postcar()Kyösti Mälkki2019-08-111-37/+0
* intel/haswell: Move stage_cache support functionKyösti Mälkki2019-08-034-39/+3
* intel/haswell: Replace monotonic timerKyösti Mälkki2019-07-133-66/+1
* cpu/x86: Move smm_lock() prototypeKyösti Mälkki2019-07-131-0/+1
* arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki2019-07-091-1/+0
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-classKyösti Mälkki2019-07-091-2/+2
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-3/+1
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-011-2/+2
* src/cpu: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-06-221-1/+0
* cpu: Add missing #include <commonlib/helpers.h>Elyes HAOUAS2019-06-211-0/+1
* cpu/intel/haswell: Link monotonic_timer.c in early stagesArthur Heymans2019-06-211-0/+3
* cpu/intel/haswell: Link tsc_freq.c in the bootblockArthur Heymans2019-06-211-0/+1
* cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35Elyes HAOUAS2019-06-212-2/+2
* cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZEArthur Heymans2019-04-251-0/+1
* nb/intel/haswell: Add an option for where verstage startsArthur Heymans2019-04-211-0/+2
* cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-04-213-59/+8
* Move calls to quick_ram_check() before CBMEM initKyösti Mälkki2019-03-271-4/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-202-2/+0
* src: Drop unused '#include <halt.h>'Elyes HAOUAS2019-03-161-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-082-4/+4
* src: Drop unused include <arch/acpi.h>Elyes HAOUAS2019-03-061-1/+0
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* security/vboot: Add measured boot modePhilipp Deppenwiese2019-02-251-0/+2
* postcar: Make more use of postcar_frame_add_romcache()Nico Huber2019-02-121-2/+1
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-3/+0
* device: Use pcidev_on_root()Kyösti Mälkki2019-01-061-2/+2
* nb/intel/haswell: Add support for PEGTristan Corrick2019-01-031-0/+2
* arch/x86: SSE2 implies SSE supportKyösti Mälkki2018-12-281-1/+0
* cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier2018-12-201-1/+1
* cpu: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS2018-12-181-1/+0
* cpuid: Add helper function for cpuid(1) functionsSubrata Banik2018-12-131-3/+3
* cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans2018-11-301-36/+0
* cpu/intel/haswell: Rework acpi/cpu.aslArthur Heymans2018-11-302-69/+15
* src: Remove unneeded include <cbfs.h>Elyes HAOUAS2018-11-161-1/+0
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