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path: root/src/cpu/intel/haswell
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* cpu: Get rid of unnecessary blank line {before,after} barceElyes HAOUAS2022-07-171-1/+0
* cpu/intel: Remove unused <acpi/acpi.h>Elyes HAOUAS2022-04-241-1/+0
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-3/+0
* cpu/intel: Use unsigned types in `get_cpu_count()`Angel Pons2021-11-051-2/+2
* cpu/x86/Kconfig.debug_cpu: drop HAVE_DISPLAY_MTRRS optionFelix Held2021-10-261-1/+0
* cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held2021-10-261-1/+0
* cpu/amd,intel/*/Makefile: don't add cpu/x86/cacheFelix Held2021-10-261-1/+0
* cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held2021-10-251-1/+0
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-221-2/+2
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-211-1/+2
* cpu/intel/haswell: Lock PKG_CST_CONFIG_CONTROL MSRAngel Pons2021-10-151-0/+1
* cpu/x86/tsc: Deduplicate Makefile logicAngel Pons2021-09-081-1/+0
* src: use mca_clear_status function instead of open codingFelix Held2021-07-141-3/+1
* cpu/intel/*/*_init: use mca_get_bank_count()Felix Held2021-07-141-4/+1
* include/cpu/x86/msr: introduce IA32_MC_*(x) macrosFelix Held2021-07-141-2/+2
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* cpu/intel/haswell: Select `HAVE_DISPLAY_MTRRS`Angel Pons2021-06-161-0/+1
* cpu/intel/haswell: Enable MCA loggingAngel Pons2021-06-161-0/+6
* cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki2021-06-071-1/+0
* cpu/intel/haswell/acpi.c: Do not report P_BLKAngel Pons2021-06-071-8/+2
* Add Kconfig TPMKyösti Mälkki2021-05-261-1/+1
* cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans2021-05-181-1/+0
* cpu/intel/haswell: Use new fixed BAR accessorsAngel Pons2021-04-101-16/+16
* cpu/intel/haswell: Constify ACPI c-state arraysAngel Pons2021-02-141-4/+4
* cpu/intel/haswell: Drop c-state table indirectionAngel Pons2021-02-142-96/+88
* cpu/intel/haswell/acpi.c: Correct `get_cores_per_package`Angel Pons2021-02-121-14/+4
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-112-2/+1
* soc/intel/broadwell: Move romstage.c to HaswellAngel Pons2021-01-242-0/+32
* soc/intel/broadwell: Use Haswell CPU headersAngel Pons2021-01-241-0/+7
* cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons2021-01-242-0/+8
* cpu/intel/haswell: Set C9/C10 vccminAngel Pons2021-01-241-0/+23
* cpu/intel/haswell: Add fast ramp voltage for BroadwellAngel Pons2021-01-242-2/+11
* cpu/intel/haswell: Enable timed MWAIT if supportedAngel Pons2021-01-222-1/+8
* cpu/intel/haswell: Clean up CPUID definitionsAngel Pons2021-01-212-20/+33
* cpu/intel/haswell: Add s0ix supportAngel Pons2021-01-212-1/+27
* cpu/intel/haswell/acpi.c: Use C-state enum definitionsAngel Pons2021-01-153-27/+27
* cpu/intel/haswell: Factor out ACPI C-state valuesAngel Pons2021-01-152-71/+27
* cpu/intel/haswell: Add delay for TPM before Flex Ratio rebootAngel Pons2021-01-111-0/+5
* cpu/intel/haswell: Allow tuning VR for C-state operationsAngel Pons2021-01-112-2/+50
* cpu/intel/haswell: Raise PSI1 threshold to 20AAngel Pons2021-01-111-1/+1
* cpu/intel/haswell: Enable turbo ratio if availableAngel Pons2021-01-111-4/+7
* cpu/intel/haswell: Do not set PMG_IO_CAPTURE_BASE MSRAngel Pons2021-01-111-6/+0
* cpu/intel/haswell/haswell.h: Align with BroadwellAngel Pons2021-01-102-55/+29
* cpu/intel/haswell: Align cosmetics with BroadwellAngel Pons2021-01-101-36/+35
* cpu/intel/haswell: Do not determine CPU type at runtimeAngel Pons2021-01-102-24/+4
* cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`Angel Pons2021-01-073-4/+4
* cpu/intel/x/chip.h: Drop unused `disable_acpi` settingAngel Pons2021-01-061-2/+0
* cpu/intel/common: Fill cpu voltage in SMBIOS tablesPatrick Rudolph2020-11-221-0/+1
* cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons2020-11-032-16/+20
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