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* arch/x86: Drop some __SMM__ guardsKyösti Mälkki2019-11-081-3/+1
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-1/+0
* cpu/x86: make set_msr_bit publicly availableMichael Niewöhner2019-10-311-17/+0
* nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-10-133-69/+4
* cpu/intel/model_2065x/bootblock: Remove dead codeArthur Heymans2019-10-061-52/+0
* cpu/intel/common: Move intel_ht_sibling() to common folderPatrick Rudolph2019-10-011-1/+0
* cpu/intel: Use CPU_INTEL_COMMON_TIMEBASEKyösti Mälkki2019-09-243-30/+1
* AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth2019-09-107-16/+0
* soc/intel: Rename some SMM support functionsKyösti Mälkki2019-08-151-1/+1
* intel/smm/gen1: Rename header fileKyösti Mälkki2019-08-151-1/+1
* cpu/intel: Replace bsp_init_and_start_aps()Kyösti Mälkki2019-08-151-1/+1
* lib/stage_cache: Refactor Kconfig optionsKyösti Mälkki2019-08-081-1/+0
* intel/nehalem,sandybridge: Move stage_cache support functionKyösti Mälkki2019-08-073-43/+2
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-classKyösti Mälkki2019-07-091-2/+2
* intel/nehalem: Move TSC_MONOTONIC_TIMERKyösti Mälkki2019-07-081-0/+1
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-011-1/+1
* src/cpu: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-06-221-1/+0
* cpu/intel/{haswell,model_206{5,a}x}: Use MSR_CORE_THREAD_COUNT for msr at 0x35Elyes HAOUAS2019-06-212-2/+2
* cpu/intel/model_2065x: Put stage cache in TSEGArthur Heymans2019-05-274-0/+57
* cpu/intel/model_2065x: Use parallel MP initArthur Heymans2019-05-273-83/+72
* cpu/intel/car/non-evict: Select NO_FIXED_XIP_ROM_SIZEArthur Heymans2019-04-251-4/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv fieldElyes HAOUAS2019-03-041-6/+6
* security/vboot: Add measured boot modePhilipp Deppenwiese2019-02-251-0/+1
* cpu/intel/model_206ax: Use parallel MP initArthur Heymans2019-01-221-1/+0
* arch/x86: SSE2 implies SSE supportKyösti Mälkki2018-12-281-1/+0
* cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier2018-12-201-1/+1
* cpu: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS2018-12-181-1/+0
* cpu/intel/model_206{5,a}x: Rework acpi/cpu.aslArthur Heymans2018-11-301-0/+7
* src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS2018-11-121-1/+1
* src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS2018-10-112-15/+2
* src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS2018-10-051-1/+1
* src/cpu: Fix typoElyes HAOUAS2018-08-091-1/+1
* Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans2018-06-211-1/+0
* cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans2018-06-052-308/+0
* cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans2018-06-051-0/+6
* Fix freeze during chipset lockdown on NehalemMatthias Gazzari2018-05-012-4/+0
* cpu/intel: Get rid of device_tElyes HAOUAS2018-04-301-1/+1
* Revert "model_206ax: Use parallel MP init"Arthur Heymans2018-04-111-0/+1
* model_206ax: Use parallel MP initArthur Heymans2018-04-111-1/+0
* intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki2018-04-091-23/+40
* sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans2018-02-271-0/+1
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-231-1/+1
* arch/x86: Clean up CONFIG_SMP and MAX_CPUS testKyösti Mälkki2017-08-191-3/+1
* cpu/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth2017-06-282-2/+2
* Use more secure HTTPS URLs for coreboot sitesPaul Menzel2017-06-071-1/+1
* cpu/intel: Add int to unsignedLee Leahy2017-03-163-5/+5
* cpu/intel: Fix the spacing issuesLee Leahy2017-03-162-4/+5
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