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coreboot.git
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4.10_branch
4.11_branch
4.12_branch
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4.2
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4.22_branch
4.3
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path:
root
/
src
/
cpu
/
intel
/
model_67x
Commit message (
Expand
)
Author
Age
Files
Lines
*
arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminator
Felix Held
2023-02-09
1
-2
/
+1
*
arch/x86/cpu: introduce and use device_match_mask
Felix Held
2023-02-08
1
-4
/
+4
*
cpu/x86/lapic: Move LAPIC configuration to MP init
Kyösti Mälkki
2022-02-05
1
-4
/
+0
*
src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper function
Felix Held
2021-10-26
2
-2
/
+1
*
cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPER
Felix Held
2021-10-26
1
-0
/
+1
*
src: Introduce `ARCH_ALL_STAGES_X86`
Angel Pons
2021-07-02
1
-1
/
+0
*
src: Move `select ARCH_X86` to platforms
Angel Pons
2021-06-30
1
-0
/
+1
*
arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`
Angel Pons
2020-09-26
1
-4
/
+1
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
2
-2
/
+0
*
src/cpu: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-05-10
1
-12
/
+1
*
src/cpu: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-04
1
-12
/
+2
*
cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard
Keith Hui
2020-01-18
1
-1
/
+0
*
AUTHORS: Move src/cpu/intel copyrights into AUTHORS file
Martin Roth
2019-09-10
2
-5
/
+0
*
Use 3rdparty/intel-microcode
Arthur Heymans
2019-07-01
1
-1
/
+1
*
src/cpu: Remove unneeded includes
Elyes HAOUAS
2018-06-01
1
-3
/
+0
*
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2017-11-23
1
-1
/
+1
*
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-08-23
1
-1
/
+1
*
src/cpu: Capitalize CPU
Elyes HAOUAS
2016-07-31
1
-1
/
+1
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
2
-8
/
+0
*
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-30
2
-4
/
+1
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
2
-2
/
+2
*
3rdparty: move to 3rdparty/blobs
Patrick Georgi
2015-05-05
1
-1
/
+1
*
3rdparty: Move to blobs
Patrick Georgi
2015-05-05
1
-1
/
+1
*
cpu/intel: (non-FSP) Remove microcode updates from tree
Alexandru Gagniuc
2015-02-28
5
-815
/
+0
*
cpu/intel (non-FSP): Use microcode from blobs repository
Alexandru Gagniuc
2015-02-28
1
-6
/
+1
*
vboot2: add verstage
Stefan Reinauer
2015-01-27
1
-0
/
+1
*
{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs
Edward O'Callaghan
2014-10-27
1
-1
/
+1
*
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-06
1
-1
/
+3
*
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-05-03
1
-0
/
+1
*
cpu/intel: Remove dummy terminators from microcode blobs
Alexandru Gagniuc
2014-01-16
1
-5
/
+0
*
cpu/intel: Make all Intel CPUs load microcode from CBFS
Alexandru Gagniuc
2014-01-16
4
-15
/
+16
*
cpu/intel/model_67x: Add missing include
Kyösti Mälkki
2013-07-30
1
-0
/
+1
*
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-03-01
1
-1
/
+1
*
Get rid of drivers class
Patrick Georgi
2012-11-27
1
-1
/
+1
*
MTRR: get physical address size from CPUID
Sven Schnelle
2012-01-10
1
-1
/
+1
*
cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
Keith Hui
2011-08-04
1
-0
/
+4
*
Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x.
Keith Hui
2010-10-13
8
-0
/
+922