summaryrefslogtreecommitdiffstats
path: root/src/cpu/intel/model_6ex
Commit message (Expand)AuthorAgeFilesLines
* cpu/x86/lapic: Move LAPIC configuration to MP initKyösti Mälkki2022-02-051-4/+0
* src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper functionFelix Held2021-10-262-2/+1
* cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPERFelix Held2021-10-261-0/+1
* src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons2021-07-021-1/+0
* src: Move `select ARCH_X86` to platformsAngel Pons2021-06-301-0/+1
* arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons2020-09-261-4/+1
* cpu,soc/intel: Drop select SMPKyösti Mälkki2020-07-261-1/+0
* src: Remove unused 'include <cpu/intel/common/common.h>Elyes HAOUAS2020-07-261-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-041-13/+2
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-1/+0
* intel/cpu: Switch older models to TSC_MONOTONIC_TIMERKyösti Mälkki2019-09-241-1/+3
* cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASEKyösti Mälkki2019-09-191-0/+1
* AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth2019-09-101-2/+0
* cpu/intel: Drop SMM_TSEG conditionalKyösti Mälkki2019-07-091-1/+1
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-011-1/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRRArthur Heymans2019-01-241-3/+0
* nb/intel/i945: Use parallel MP initArthur Heymans2019-01-232-13/+1
* cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier2018-12-201-1/+1
* nb/intel/i945: Use common SMM_TSEG codeArthur Heymans2018-12-031-0/+1
* src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS2018-10-111-1/+0
* src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS2018-10-051-2/+2
* cpu/intel/car: Remove obsolete filesKyösti Mälkki2018-06-171-267/+0
* intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS2017-11-301-1/+1
* Constify struct cpu_device_id instancesJonathan Neuschäfer2017-11-231-1/+1
* Use more secure HTTPS URLs for coreboot sitesPaul Menzel2017-06-071-1/+1
* cpu/intel: Wrap lines at 80 columnsLee Leahy2017-03-161-2/+4
* cpu/intel: Fix the spacing issuesLee Leahy2017-03-161-2/+2
* cpu/intel: Indent with tabsLee Leahy2017-03-161-1/+1
* cpu/intel/model_6{e,f}x: Unify init filesPaul Menzel2017-03-091-4/+7
* cpu/intel/common: Add/Use common function to set virtualizationMatt DeVillier2016-12-273-35/+5
* intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki2016-12-111-20/+40
* intel cache-as-ram: Unify stack setupKyösti Mälkki2016-11-111-8/+4
* cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4EArthur Heymans2016-10-091-2/+8
* src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS2016-08-231-1/+1
* src/cpu: Capitalize CPUElyes HAOUAS2016-07-311-2/+2
* intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki2016-07-261-1/+1
* intel car: Unify postcodesKyösti Mälkki2016-07-221-5/+10
* intel car: Unify whitespace and comment fixesKyösti Mälkki2016-07-221-1/+1
* intel car: Remove guard on XIP_ROM_SIZEKyösti Mälkki2016-07-221-2/+0
* Ignore RAMTOP for MTRRsKyösti Mälkki2016-06-221-1/+1
* intel cache-as-ram: Fix comment about MTRRsKyösti Mälkki2016-06-221-2/+2
* intel/model_6ex: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki2016-06-211-2/+8
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-312-8/+0
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-151-19/+19
* cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc2015-09-302-4/+1
* x86: Drop -Wa,--divideStefan Reinauer2015-07-071-2/+2
* Remove empty lines at end of fileElyes HAOUAS2015-06-081-1/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-212-3/+2
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-27 21:25:57 +0000