index
:
coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
coreboot-v1
coreboot-v3
main
master
rampayload
Coreboot firmware sources
coreboot
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
cpu
/
intel
/
slot_1
Commit message (
Expand
)
Author
Age
Files
Lines
*
treewide [Kconfig]: Remove useless comment
Elyes HAOUAS
2021-02-02
1
-1
/
+1
*
arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits
Kyösti Mälkki
2021-01-28
1
-2
/
+1
*
src/cpu: Drop unneeded empty lines
Elyes HAOUAS
2020-09-21
1
-1
/
+0
*
cpu/intel/slot_1: Select 16KiB bootblock if console is enabled
Keith Hui
2020-06-04
1
-0
/
+1
*
src: Remove leading blank lines from SPDX header
Elyes HAOUAS
2020-05-18
1
-2
/
+0
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
4
-4
/
+0
*
src/cpu: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-05-10
1
-12
/
+1
*
src/: Replace GPL boilerplate with SPDX headers
Patrick Georgi
2020-05-09
1
-9
/
+1
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
2
-22
/
+2
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
2
-4
/
+2
*
cpu/intel/slot_1: Cache romstage XIP execution
Arthur Heymans
2020-03-03
1
-0
/
+1
*
cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-11-25
2
-2
/
+10
*
Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol
Arthur Heymans
2019-11-25
1
-0
/
+1
*
intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMER
Kyösti Mälkki
2019-11-05
1
-1
/
+2
*
cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE
Kyösti Mälkki
2019-11-03
1
-0
/
+1
*
AUTHORS: Move src/cpu/intel copyrights into AUTHORS file
Martin Roth
2019-09-10
4
-9
/
+0
*
arch/x86: Flip HAVE_MONOTONIC_TIMER default
Kyösti Mälkki
2019-07-09
1
-0
/
+1
*
cpu/x86: Flip SMM_TSEG default
Kyösti Mälkki
2019-07-09
1
-0
/
+1
*
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-11-12
1
-1
/
+0
*
nb/intel/i440bx: Switch to POSTCAR_STAGE
Kyösti Mälkki
2018-06-17
1
-0
/
+1
*
cpu/intel/slot_1: Switch to different CAR setup
Kyösti Mälkki
2018-06-17
2
-3
/
+3
*
src/cpu: Remove unneeded includes
Elyes HAOUAS
2018-06-01
1
-2
/
+0
*
cpu/intel/slot_1: Increase CAR size to 8KiB
Keith Hui
2017-09-12
1
-2
/
+2
*
cpu/intel: Wrap lines at 80 columns
Lee Leahy
2017-03-16
1
-19
/
+34
*
cpu/intel: Fix brace issues detected by checkpatch.pl
Lee Leahy
2017-03-16
1
-4
/
+2
*
cpu/intel: Fix the spacing issues
Lee Leahy
2017-03-16
1
-14
/
+14
*
cpu/intel: Indent with tabs
Lee Leahy
2017-03-16
1
-1
/
+1
*
intel post-car: Split legacy sockets
Kyösti Mälkki
2016-11-08
1
-1
/
+1
*
Remove non-ascii & unprintable characters
Martin Roth
2016-08-01
1
-1
/
+1
*
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
1
-0
/
+1
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
4
-16
/
+0
*
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-09-04
1
-1
/
+1
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
4
-4
/
+4
*
intel CAR: Fix DCACHE_RAM_BASE for old sockets
Kyösti Mälkki
2014-12-30
1
-0
/
+4
*
cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-07-17
1
-1
/
+0
*
cpu: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-07-08
1
-1
/
+0
*
Drop redundant select CACHE_AS_RAM
Kyösti Mälkki
2014-07-05
1
-1
/
+0
*
cpu/intel: Make all Intel CPUs load microcode from CBFS
Alexandru Gagniuc
2014-01-16
1
-1
/
+11
*
cpu: Fix spelling
Martin Roth
2013-07-11
1
-3
/
+3
*
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-03-01
4
-4
/
+4
*
Remove chip.h files without config structure
Kyösti Mälkki
2012-10-07
2
-23
/
+0
*
Auto-declare chip_operations
Kyösti Mälkki
2012-08-22
1
-2
/
+0
*
cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
Keith Hui
2011-08-04
2
-0
/
+812
*
Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory.
Keith Hui
2010-10-16
1
-0
/
+1
*
Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.
Uwe Hermann
2010-10-15
1
-5
/
+0
*
Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x.
Keith Hui
2010-10-13
1
-0
/
+1
*
Add missing include of model_6bx for slot_1.
Keith Hui
2010-10-12
1
-0
/
+1
*
Convert all Intel 440BX boards to Cache-as-RAM (CAR).
Uwe Hermann
2010-10-06
2
-0
/
+3
*
Rename build system variables to be more intuitive, and
Patrick Georgi
2010-09-30
1
-1
/
+1
*
license header fixes
Nils Jacobs
2010-05-14
1
-2
/
+1
[next]