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* Clean up KconfigStefan Reinauer2012-11-162-0/+8
* Add spinlock to serialize Intel microcode updatesStefan Reinauer2012-11-131-1/+12
* Clean up stack checking codeStefan Reinauer2012-11-131-16/+3
* clean up lapic_cpu_init.cStefan Reinauer2012-11-131-25/+48
* Pass the CPU index as a parameter to startup.Ronald G. Minnich2012-11-132-8/+12
* Fix CONFIG_MAX_CPU set to 1 CPU build problemStefan Reinauer2012-11-131-0/+2
* Support better tracking of AP stack usage.Ronald G. Minnich2012-11-131-4/+31
* ivybridge: Catch unknown CPU revisionsStefan Reinauer2012-11-121-0/+1
* Fix gcc-4.7 building problem.Han Shen2012-11-121-1/+1
* Initialize the VMX MSRMarc Jones2012-11-122-13/+14
* Revert "Remove code that enables/disables VMX in coreboot on chromebooks."Marc Jones2012-11-123-0/+43
* sandybridge: Correct reporting of cores and threadsStefan Reinauer2012-11-121-9/+12
* Leave power control registers unlockedSameer Nanda2012-11-071-0/+13
* cpu/intel/model_1067x: Add proper c-state/p-state/thermal supportNico Huber2012-11-063-31/+226
* intel/socket_BGA956: enable speedstep, CAR, MMX, SSEPatrick Georgi2012-11-062-0/+16
* Overhaul speedstep codeNico Huber2012-11-053-81/+305
* Fix some indentation flaws and break very long linesNico Huber2012-11-051-12/+23
* AMD agesa: add enable cache at the end of disable_cache_as_ramSiyuan Wang2012-11-021-2/+6
* Correct FSB reading in speedstep ACPINico Huber2012-11-021-1/+3
* Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber2012-11-014-4/+0
* Add support for socket LGA775Stefan Tauner2012-10-305-0/+52
* Fix typo in mPGA603 socketKyösti Mälkki2012-10-071-1/+1
* Remove chip.h files without config structureKyösti Mälkki2012-10-0764-364/+0
* C32 legacy code: change CONFIG_CPU_AMD_SOCKET_C32 to CONFIG_CPU_AMD_SOCKET_C3...Siyuan Wang2012-09-192-8/+8
* VIA Nano: Add support for VIA Nano CPUsAlexandru Gagniuc2012-09-057-3/+505
* buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc2012-09-057-25/+134
* Intel model_106cx: change CAR to HT-capableKyösti Mälkki2012-08-272-1/+2
* Auto-declare chip_operationsKyösti Mälkki2012-08-2233-66/+0
* Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPUKyösti Mälkki2012-08-091-28/+21
* AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki2012-08-091-0/+38
* Synchronize rdtsc instructionsStefan Reinauer2012-08-099-1/+24
* Move cpus_ready_for_init() to AMD K8Kyösti Mälkki2012-08-072-6/+0
* AMD S3: Remove the hardcoded volatile positionzbao2012-08-051-3/+3
* Make the device tree available in the rom stageStefan Reinauer2012-08-041-0/+2
* Intel CPUs: Fix counting of CPU coresKyösti Mälkki2012-08-032-9/+32
* Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki2012-08-011-0/+4
* Revert "Use broadcast SIPI to startup siblings"Sven Schnelle2012-07-3118-104/+454
* Revert "remove CONFIG_SERIAL_CPU_INIT"Sven Schnelle2012-07-312-0/+8
* CPU: Add option to set TCC activation offsetDuncan Laurie2012-07-263-0/+29
* ACPI: Add a method to notify OS to re-read _PPCDuncan Laurie2012-07-261-8/+19
* ACPI: Add function to write _PPC using NVSDuncan Laurie2012-07-261-1/+1
* USBDEBUG: buffer up to 8 bytesSven Schnelle2012-07-261-3/+4
* Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logsStefan Reinauer2012-07-262-13/+1
* Enable Microcode in CBFS for all SandyBridge/IvyBridge systemsStefan Reinauer2012-07-264-27/+2
* SMM: Fix state table for Intel Core2 CPUsStefan Reinauer2012-07-251-0/+1
* Fix comment to reference IvyBridge, tooStefan Reinauer2012-07-251-1/+1
* Include SandyBridge Microcode when IvyBridge is enabledStefan Reinauer2012-07-251-6/+0
* Fix date output in Microcode updateStefan Reinauer2012-07-251-2/+2
* Fix LAPIC timer on Ivy Bridge systemsStefan Reinauer2012-07-251-0/+1
* CPU: Set flex ratio to nominal TDP ratio in bootblockDuncan Laurie2012-07-242-0/+67
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