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* src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-04127-1557/+254
* cpu/x86/Makefile.inc: Fix external toolchain buildArthur Heymans2020-03-291-1/+1
* acpi: correct the processor devices scopeMichał Żygowski2020-03-256-12/+12
* acpi: Change Processor ACPI Name (Intel only)Christian Walter2020-03-236-16/+16
* cpu/x86: Fix typoSubrata Banik2020-03-211-1/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-172-3/+0
* cpu/intel/model_2065x: Add missing CPU IDsAngel Pons2020-03-151-2/+6
* treewide: Replace uses of "Nehalem"Angel Pons2020-03-153-3/+3
* nb/intel/nehalem: Rename to ironlakeAngel Pons2020-03-155-6/+6
* prog_loaders: Remove CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADINGJulius Werner2020-03-113-75/+0
* cpu/x86/smm: Add smm_size to relocatable smmstubArthur Heymans2020-03-072-4/+9
* src: capitalize 'PCIe'Elyes HAOUAS2020-03-041-2/+2
* cpu/intel/model_206ax: Lock MSR on all coresPatrick Rudolph2020-03-042-3/+2
* cpu/microcode: Fix config CPU_MICROCODE_CBFS_EXTERNAL_BINSNico Huber2020-03-041-1/+1
* cpu/intel/slot_1: Cache romstage XIP executionArthur Heymans2020-03-031-0/+1
* cpu/Kconfig: Remove old reference to ROMCCElyes HAOUAS2020-02-241-4/+2
* src: capitalize 'RAM'Elyes HAOUAS2020-02-241-1/+1
* cpu/x86/smm: Convert C++ style commentEugene Myers2020-02-211-1/+1
* cpu: Allow to configure microcode at pre-defined addressAndrey Petrov2020-02-181-0/+4
* cpu/x86/name: Make name.c file available in romstageUsha P2020-02-181-0/+1
* treewide: capitalize 'BIOS'Elyes HAOUAS2020-02-171-1/+1
* cpu/x86/smm: Remove blank line in codeEugene Myers2020-02-171-1/+0
* cpu/x86: Remove unnecessary guardEugene Myers2020-02-171-14/+9
* cpu/x86: Adjust STM smm_save_state_sizeEugene Myers2020-02-171-13/+1
* cpu/intel: Drop unused fileElyes HAOUAS2020-02-091-16/+0
* cpu/x86/smm: Add overflow checkNico Huber2020-02-091-0/+2
* cpu/x86: Put guard around align for smm_save_state_sizeEugene Myers2020-02-061-8/+13
* security/intel/stm: Add STM supportEugene Myers2020-02-053-1/+65
* cpu/x86: Make MP init timeout configurableJonathan Zhang2020-02-041-4/+6
* cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboardKeith Hui2020-01-185-5/+0
* drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki2020-01-091-1/+1
* cpu/intel/microcode: Apply more strict guard for assembly filesKyösti Mälkki2019-12-271-1/+0
* src/x86|cpu/intel: Hardcode FIT and IDMarshall Dawson2019-12-261-1/+1
* cpu/intel/car/p4-netburst: Add assert for SIPI_VECTOR_IN_ROMKyösti Mälkki2019-12-261-3/+23
* AGESA,binaryPI: Drop remains of ROMCC_BOOTBLOCKKyösti Mälkki2019-12-206-139/+0
* AGESA,binaryPI: Enable lapic early for udelay()Kyösti Mälkki2019-12-203-18/+0
* AGESA fam14: Remove early PCI subsystem ID settingKyösti Mälkki2019-12-201-14/+0
* AGESA fam14: Remove early p-state settingKyösti Mälkki2019-12-201-4/+0
* arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHEKyösti Mälkki2019-12-191-12/+0
* arch/x86: Fix S3 resume without stage cacheKyösti Mälkki2019-12-191-1/+0
* src: Remove unused 'include <arch/cpu.h>'Elyes HAOUAS2019-12-193-3/+1
* src: Use '#include <smp/node.h>' when appropriateElyes HAOUAS2019-12-193-0/+3
* arch/x86: Drop uses of ROMCC_BOOTBLOCKArthur Heymans2019-12-191-1/+0
* Drop ROMCC code and header guardsArthur Heymans2019-12-191-3/+0
* cpu/x86/mp_init: Fix typoElyes HAOUAS2019-12-181-1/+1
* src: Remove unused 'include <pc80/mc146818rtc.h>'Elyes HAOUAS2019-12-181-1/+0
* cpu/intel: Remove ROMCC header guards and codeElyes HAOUAS2019-12-174-34/+2
* bootblock: Provide some common prototypesKyösti Mälkki2019-12-144-24/+3
* sb/amd/cimx/sb800: Postpone Sb_Poweron_Init() callKyösti Mälkki2019-12-132-25/+0
* AGESA, binaryPI: implement C bootblockMichał Żygowski2019-12-113-0/+17
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