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* cpu/intel/model_206ax: Add more CPU steppingsAngel Pons2020-12-251-0/+4
* nb/intel/sandybridge: Move steppings to CPU headerAngel Pons2020-12-251-0/+24
* arch/x86: Link gdt_init.S into bootblockKyösti Mälkki2020-12-162-2/+1
* arch/x86: Clean up bootblock assemblyKyösti Mälkki2020-12-162-29/+4
* arch/x86: Combine bootblock linker scriptsKyösti Mälkki2020-12-143-38/+0
* nb/intel/sandybridge: Clean up stepping logicAngel Pons2020-12-121-0/+6
* Drop many cases of .previous directive useKyösti Mälkki2020-12-111-2/+0
* cpu/x86/64bit/exit32.inc: Don't invalidate cache in CARPatrick Rudolph2020-12-101-1/+2
* cpu/x86/64bit: Add code to call function in protected modePatrick Rudolph2020-12-052-0/+73
* cpu/x86/smm_module_loaderv2: Fix compiling for x86_64Arthur Heymans2020-12-041-7/+7
* mb/emulation/x86: Add optional parallel_mp init supportArthur Heymans2020-12-041-0/+14
* cpu/qemu-x86: Increase MAX_CPUS to have actual AP initArthur Heymans2020-12-041-0/+5
* cpu/x86/lapic/secondary.S: Adapt for x86_64Arthur Heymans2020-12-041-0/+13
* cpu/qemu-x86: Add the option to have no SMMArthur Heymans2020-12-041-1/+20
* cbfs: Simplify load/map API names, remove type argumentsJulius Werner2020-12-022-5/+2
* cpu/x86/smm/smm_stub: Fix stack canary on x86_64Patrick Rudolph2020-12-021-0/+3
* cpu/x86/smm/smm_stub: Fix GDT for x86_64Patrick Rudolph2020-12-021-1/+1
* cpu/x86/early_reset: Mark assemblycode as 32bitPatrick Rudolph2020-12-011-0/+1
* cpu/intel/microcode: Mark assemblycode as 32bitPatrick Rudolph2020-12-011-0/+1
* cpu/x86/sipi: Add x86_64 supportPatrick Rudolph2020-12-012-0/+25
* Makefile.inc: Move adding mcu FIT entriesArthur Heymans2020-11-271-0/+28
* cpu/intel/common: Fill cpu voltage in SMBIOS tablesPatrick Rudolph2020-11-224-0/+17
* cpu/amd/microcode: Remove dead MakefileArthur Heymans2020-11-221-2/+0
* cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth2020-11-228-259/+0
* intel/socket_441: Increase bootblock sizeJulius Werner2020-11-211-1/+1
* ACPI S3: Replace acpi_is_wakeup()Kyösti Mälkki2020-11-193-3/+3
* Revert "arch|cpu/x86: Add Kconfig option for x86 reset vector"Kyösti Mälkki2020-11-171-5/+7
* cpu/x86/smm/smm_module_loaderv2: Properly print stack_endArthur Heymans2020-11-161-2/+2
* cpu/x86/smm/smm_module_loaderv2.c: Use more variablesArthur Heymans2020-11-161-3/+5
* cpu/x86/smm: Check that the stub size is < save state sizeArthur Heymans2020-11-162-0/+12
* cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registersArthur Heymans2020-11-101-2/+2
* sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans2020-11-101-1/+1
* cpu/intel/model_206ax: Get CPU frequencies for SMBIOS type 4Michał Żygowski2020-11-091-0/+20
* cpu/x86/smm: Add a common save state handlingArthur Heymans2020-11-092-0/+79
* cpu/x86/smm/smm.ld: Assert that CONFIG_MAX_CPUS <= 4Arthur Heymans2020-11-091-0/+3
* cpu/x86/smm/smihandler.c: Simplify smm revision handlingArthur Heymans2020-11-091-50/+4
* cpu/intel/haswell: Move smmrelocate.c MSR definitions to headerAngel Pons2020-11-032-16/+20
* cpu/x86/mp_init: Add support for x86_64Patrick Rudolph2020-11-031-4/+4
* cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmodePatrick Rudolph2020-11-022-6/+39
* cpu/x86/smm: Pass smm.ld through src-to-objArthur Heymans2020-11-021-3/+5
* cpu/x86/lapic: rename virtual wire mode initialization functionFelix Held2020-10-311-1/+1
* {cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons2020-10-311-1/+1
* cpu/intel/common: correct MSR for the Nominal Performance in CPPCMichael Niewöhner2020-10-311-7/+9
* cpu/x86/sipi_vector.S: Use correct suffix for btsJacob Garber2020-10-301-1/+1
* cpu/x86: increase timeout for CPUs to check in after 2nd SIPIJonathan Zhang2020-10-301-7/+7
* cpu/intel/Makefile.inc: Use correct Kconfig symbolsAngel Pons2020-10-301-3/+3
* cpu/x86/mtrr: fix OVERFLOW_BEFORE_WIDENJonathan Zhang2020-10-271-2/+2
* cpu/intel/common: implement the two missing CPPC v2 autonomous registersMichael Niewöhner2020-10-261-4/+16
* cpu/intel/common: rework code previously moved to common cpu codeMichael Niewöhner2020-10-242-27/+15
* {cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner2020-10-248-91/+49