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path:
root
/
src
/
cpu
Commit message (
Expand
)
Author
Age
Files
Lines
*
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-08-23
54
-73
/
+73
*
Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS
Aaron Durbin
2016-08-18
1
-7
/
+0
*
Kconfig: lay groundwork for not assuming SPI flash boot device
Aaron Durbin
2016-08-18
2
-0
/
+2
*
cpu/ti/am355x: Fix array overrun
Paul Menzel
2016-08-14
1
-1
/
+1
*
Remove non-ascii & unprintable characters
Martin Roth
2016-08-01
3
-5
/
+5
*
src/cpu: Capitalize CPU
Elyes HAOUAS
2016-07-31
54
-102
/
+102
*
src/cpu: Capitalize ROM and RAM
Elyes HAOUAS
2016-07-31
12
-14
/
+14
*
cpu/x86: Support CPUs without rdmsr/wrmsr instructions
Lee Leahy
2016-07-27
1
-0
/
+7
*
intel car: Use MTRR WRPROT type for XIP cache
Kyösti Mälkki
2016-07-26
2
-2
/
+2
*
intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE
Kyösti Mälkki
2016-07-26
1
-4
/
+7
*
intel/haswell: Remove useless MTRR clear
Kyösti Mälkki
2016-07-23
1
-8
/
+0
*
intel/haswell post-car: Minor fix on MTRR setting
Kyösti Mälkki
2016-07-23
1
-2
/
+2
*
intel/haswell: Add asmlinkage for romstage_after_car()
Kyösti Mälkki
2016-07-23
2
-2
/
+2
*
cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary
Aaron Durbin
2016-07-22
1
-8
/
+8
*
intel car: Unify postcodes
Kyösti Mälkki
2016-07-22
5
-27
/
+22
*
intel car: Unify whitespace and comment fixes
Kyösti Mälkki
2016-07-22
5
-16
/
+15
*
intel car: Remove guard on XIP_ROM_SIZE
Kyösti Mälkki
2016-07-22
3
-7
/
+0
*
intel model_106cx: Include CAR from socket directory
Kyösti Mälkki
2016-07-22
3
-2
/
+6
*
AMD k8 fam10: Fix CAR GLOBALS late in romstage
Kyösti Mälkki
2016-07-21
1
-3
/
+0
*
AMD binaryPI: Use common romstage ram stack
Kyösti Mälkki
2016-07-15
1
-3
/
+5
*
AMD binaryPI: Split romstage ram stack
Kyösti Mälkki
2016-07-15
3
-11
/
+11
*
AMD binaryPI: Use common ACPI S3 recovery
Kyösti Mälkki
2016-07-15
1
-25
/
+6
*
AGESA: Use common romstage ram stack
Kyösti Mälkki
2016-07-15
1
-3
/
+5
*
AGESA: Use common ACPI S3 recovery
Kyösti Mälkki
2016-07-15
1
-25
/
+7
*
intel post-car: Consolidate choose_top_of_stack()
Kyösti Mälkki
2016-07-10
1
-15
/
+1
*
AMD k8 fam10: Drop excessive spinlock initialization
Kyösti Mälkki
2016-07-10
1
-7
/
+0
*
AMD k8 fam10: Fix romstage handoff
Kyösti Mälkki
2016-07-10
1
-8
/
+13
*
AMD k8 fam10: Refactor S3 recovery
Kyösti Mälkki
2016-06-29
1
-20
/
+16
*
intel/haswell: No need for ACPI S3 resume backup
Kyösti Mälkki
2016-06-29
1
-7
/
+0
*
intel romstage: Use run_ramstage()
Kyösti Mälkki
2016-06-29
1
-2
/
+2
*
region: Add writeat and eraseat support
Antonello Dettori
2016-06-24
1
-1
/
+1
*
ACPI S3: Add common recovery code
Kyösti Mälkki
2016-06-22
1
-17
/
+2
*
ACPI S3: Move SMP trampoline recovery
Kyösti Mälkki
2016-06-22
1
-14
/
+24
*
Ignore RAMTOP for MTRRs
Kyösti Mälkki
2016-06-22
12
-18
/
+18
*
intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-22
2
-2
/
+9
*
intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-22
2
-2
/
+9
*
intel cache-as-ram: Fix comment about MTRRs
Kyösti Mälkki
2016-06-22
3
-6
/
+6
*
intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
5
-2
/
+12
*
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
4
-3
/
+11
*
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
6
-2
/
+13
*
amd/fam_10h-fam_15h: allow building without microcode updates
Arthur Heymans
2016-06-20
1
-1
/
+1
*
amd/geode: Fix comment about ACPI S3
Kyösti Mälkki
2016-06-20
2
-6
/
+2
*
VIA C7 NANO: Fix early MTRR setting
Kyösti Mälkki
2016-06-20
1
-3
/
+3
*
intel: Fix romstage main() with asmlinkage
Kyösti Mälkki
2016-06-18
1
-0
/
+7
*
intel/cache_as_ram_ht.inc: Fix include
Kyösti Mälkki
2016-06-18
2
-2
/
+2
*
intel cache_as_ram: Fix typo in comment
Kyösti Mälkki
2016-06-18
1
-1
/
+1
*
intel/model_206ax: Move platform specific defines
Kyösti Mälkki
2016-06-17
1
-1
/
+1
*
Move definitions of HIGH_MEMORY_SAVE
Kyösti Mälkki
2016-06-17
3
-0
/
+3
*
Fix some cbmem.h includes
Kyösti Mälkki
2016-06-17
3
-3
/
+1
*
AGESA vendorcode: Build a common amdlib
Kyösti Mälkki
2016-05-18
1
-0
/
+29
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