summaryrefslogtreecommitdiffstats
path: root/src/drivers/intel
Commit message (Expand)AuthorAgeFilesLines
* drivers/intel/wifi: Make Intel wifi driver arch agnosticKarthikeyan Ramasubramanian2019-07-131-1/+1
* drivers/wifi: Add generic WiFi driverKarthikeyan Ramasubramanian2019-07-133-252/+13
* soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLERKyösti Mälkki2019-07-131-11/+9
* drivers/intel/fsp1_1/raminit.c: Always check FSP HOBsFrans Hendriks2019-07-102-60/+24
* drivers/intel: Move FSP stage_cache implementation into common blockSubrata Banik2019-07-092-32/+0
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-3/+1
* drivers/intel/fsp1_1: Adjust postcar MTRRsKyösti Mälkki2019-07-041-49/+7
* drivers: Add missing #include <commonlib/helpers.h>Elyes HAOUAS2019-06-223-0/+3
* drivers/intel/fsp: use ALIGN_UP instead of ALIGN for better readabilityFelix Held2019-06-212-2/+2
* drivers/intel/fsp1_0/fastboot_cache: Remove unneeded 'else'Elyes HAOUAS2019-06-211-6/+5
* drivers/fsp1_0: select CACHE_MRC_SETTINGS if MRC_CACHE_FMAPMatt DeVillier2019-06-141-1/+2
* {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK supportFrans Hendriks2019-06-124-48/+13
* src/drivers/intel: Avoid NULL pointer dereferenceJohn Zhao2019-06-051-0/+3
* drivers/fsp20: Fix spelling in help textFelix Singer2019-06-041-1/+1
* soc/intel/braswell: Use common cpu/intel/car codeArthur Heymans2019-06-043-97/+35
* drivers/intel/fsp1_1: Exit cleanly if FSP not foundJacob Garber2019-06-031-9/+6
* src/{device,drivers}: Add missing 'include <types.h>'Elyes HAOUAS2019-05-296-0/+6
* soc/intel/skylake: Use common cpu/intel/car romstage codeArthur Heymans2019-05-292-10/+5
* drivers/intel/fsp1.1: Simplify bootflow and clean upArthur Heymans2019-05-292-51/+44
* drivers/intel/fsp2_0: Dont' use CAR_GLOBALArthur Heymans2019-05-291-4/+3
* Clean up unused arch/early_variables.h headerArthur Heymans2019-05-293-3/+1
* drivers/intel/fsp2_0: Fix typo mistakeSubrata Banik2019-05-291-1/+1
* src/drivers/intel/fsp1_0: Move PLATFORM_USES_FSP1_0Arthur Heymans2019-05-271-0/+7
* drivers/intel/fsp1.1: Remove unused functionArthur Heymans2019-05-272-8/+0
* drivers/intel/fsp1.1: Remove stale comment on bootflowArthur Heymans2019-05-271-35/+0
* post_code: add post code for video initialization failureKeith Short2019-05-221-1/+13
* post_code: add post code for memory errorKeith Short2019-05-222-2/+4
* post_code: add post code for invalid vendor binaryKeith Short2019-05-223-9/+14
* soc/intel/fsp1.1: Implement postcar stageArthur Heymans2019-05-2112-399/+181
* src/drivers/intel/fsp2_0: Fix logical 'and' of equal expressionsElyes HAOUAS2019-05-211-3/+3
* {arch,cpu}/x86, drivers/intel: Restore cpu_index error handlingJacob Garber2019-05-161-0/+9
* Remove remaining unnecessary ENV_RAMSTAGE guardSubrata Banik2019-05-161-2/+0
* nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGENico Huber2019-05-121-2/+2
* 3rdparty/libgfxinit: Update for runtime CPU detectionNico Huber2019-05-121-11/+8
* intel/fsp1_1: Drop remnants of `pei_data`Nico Huber2019-05-072-6/+0
* intel/fsp1_1: Move MRC cache pointers into `romstage_params`Nico Huber2019-05-073-21/+26
* intel/fsp1_1: Drop `boot_mode` from `pei_data`Nico Huber2019-05-072-5/+5
* intel/fsp1_1: Drop unused, weak raminit()Nico Huber2019-05-071-7/+0
* drivers/intel/fsp2_0: Fix fsp post-init validationMatthew Garrett2019-05-061-2/+7
* Fix code that would trip -Wtype-limitsJulius Werner2019-05-061-9/+0
* drivers/intel/fsp1_1/cache_as_ram.inc: Reduce max line length to 80Frans Hendriks2019-05-061-7/+7
* drivers/fsp 1.1: clean up Kconfig optionsMatt DeVillier2019-05-031-14/+26
* src: include <assert.h> when appropriateElyes HAOUAS2019-04-231-1/+0
* src: Use include <console/console.h> when appropriateElyes HAOUAS2019-04-232-0/+4
* src: Add missing include 'console.h'Elyes HAOUAS2019-04-231-0/+1
* drivers/intel/fsp2_0: Set basename for FSP binariesFelix Singer2019-04-211-1/+1
* drivers/intel/fsp1_1: Configure UART after memory initFrans Hendriks2019-04-112-0/+9
* src: Use include <delay.h> when appropriateElyes HAOUAS2019-04-062-3/+1
* drivers/intel/fsp2_0: Use same stack with corebootSubrata Banik2019-04-021-1/+1
* src: Use include <reset.h> when appropriateElyes HAOUAS2019-03-291-1/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-10 03:34:16 +0000