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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
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4.22_branch
4.3
4.4
4.8_branch
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path:
root
/
src
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include
/
cpu
/
intel
/
l2_cache.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
src: Remove unnecessary semicolons from the end of macros
Martin Roth
2023-11-10
1
-1
/
+1
*
treewide: Remove 'extern' from functions declaration
Elyes Haouas
2023-05-26
1
-9
/
+9
*
src/include: Add missing includes
Elyes HAOUAS
2020-07-26
1
-0
/
+2
*
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
1
-1
/
+0
*
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
1
-12
/
+1
*
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
1
-2
/
+1
*
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-17
1
-1
/
+0
*
src: Move common IA-32 MSRs to <cpu/x86/msr.h>
Elyes HAOUAS
2018-10-11
1
-1
/
+0
*
src/include: Wrap lines at 80 columns
Lee Leahy
2017-03-13
1
-2
/
+4
*
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-31
1
-4
/
+0
*
Remove address from GPLv2 headers
Patrick Georgi
2015-05-21
1
-2
/
+1
*
cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
Keith Hui
2011-08-04
1
-0
/
+101