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intel
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel: Add Lunar Lake device IDs
Appukuttan V K
2024-01-24
1
-0
/
+1
*
src: Remove unnecessary semicolons from the end of macros
Martin Roth
2023-11-10
1
-1
/
+1
*
arch/x86: Reduce max phys address size for Intel TME capable SoCs
Jeremy Compostella
2023-09-12
1
-0
/
+3
*
src/*/post_code.h: Change post code prefix to POSTCODE
Yuchen He
2023-08-05
1
-20
/
+20
*
treewide: Drop the suffixes from ADL and RPL CPUID macros and strings
Michał Żygowski
2023-07-12
1
-11
/
+11
*
soc/intel/alderlake: Add support for Raptor Lake S CPUs
Max Fritz
2023-07-12
1
-0
/
+4
*
soc/intel/meteorlake: Add QS(C0) stepping CPU ID
Musse Abdullahi
2023-06-29
1
-0
/
+1
*
treewide: Remove 'extern' from functions declaration
Elyes Haouas
2023-05-26
1
-9
/
+9
*
soc/intel/meteorlake: Add B0 stepping CPU ID
Musse Abdullahi
2023-04-15
1
-0
/
+1
*
cpu/intel: Remove redefined SAPPHIRERAPIDS_SP CPUID to fix build error
Johnny Lin
2023-03-24
1
-6
/
+0
*
soc/intel/xeon_sp: Report platform cpu info
Naresh Solanki
2023-03-23
1
-0
/
+9
*
soc/intel/xeon_sp/spr: Add header files and romstage code
Jonathan Zhang
2023-03-19
1
-0
/
+6
*
src: Move POST_BOOTBLOCK_CAR to common postcodes and use it
Martin Roth
2023-02-07
1
-1
/
+0
*
tree: Drop Intel Ice Lake support
Felix Singer
2023-01-19
1
-2
/
+0
*
cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm
Arthur Heymans
2022-12-05
1
-3
/
+5
*
cpu/intel/car: Define post codes
Martin Roth
2022-11-23
1
-0
/
+29
*
mb/emulation/qemu-q35: Split smm_close() and smm_lock()
Kyösti Mälkki
2022-11-17
1
-1
/
+2
*
cpu/*: Drop PARALLEL_MP leftovers
Arthur Heymans
2022-11-09
1
-9
/
+0
*
soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID
Jeremy Soller
2022-09-16
1
-1
/
+2
*
include: Add SPDX-License-Identifiers to files missing them
Martin Roth
2022-08-01
1
-0
/
+2
*
soc/intel: Add Raptor Lake device IDs
zhixingma
2022-06-28
1
-0
/
+1
*
cpu/intel/microcode: Have API to re-load microcode patch
Subrata Banik
2022-06-22
1
-0
/
+4
*
soc/intel/alderlake/report_platform.c: Add ADL-S identification
Michał Żygowski
2022-06-17
1
-0
/
+4
*
mb/emulation/qemu-q35: Support PARALLEL_MP with SMM_ASEG
Arthur Heymans
2022-06-01
1
-0
/
+1
*
soc/intel: Add Raptor Lake device IDs
Bora Guvendik
2022-05-16
1
-0
/
+2
*
soc/intel/alderlake: Add new CPU ID
Lean Sheng Tan
2022-04-04
1
-0
/
+1
*
soc/intel/alderlake: Update CPU IDs with correct steppings
Lean Sheng Tan
2022-04-04
1
-4
/
+4
*
soc/intel/common: Include Meteor Lake device IDs
Wonkyu Kim
2022-03-09
1
-1
/
+2
*
soc/intel/common: Include Alder Lake-N device IDs
Usha P
2021-11-29
1
-0
/
+1
*
soc/intel/alderlake: Add CPU ID 0x906a4
Meera Ravindranath
2021-09-30
1
-0
/
+1
*
soc/intel: Add TGL-H CPUID
Jeremy Soller
2021-08-24
1
-0
/
+1
*
cpu/intel: Add dedicated file to grow Intel CPUIDs
Subrata Banik
2021-07-17
1
-0
/
+57
*
soc/intel/car: Add support for bootguard CAR
Arthur Heymans
2021-06-22
1
-0
/
+3
*
soc/intel/common: Add InSMM.STS support
Angel Pons
2021-06-21
1
-0
/
+2
*
cpu/intel/msr.h: Sort MSRs in ascending order
Angel Pons
2021-06-15
1
-4
/
+4
*
cpu/intel/msr.h: Add license header
Angel Pons
2021-06-15
1
-0
/
+2
*
cpu/x86/entry16.S: Make Intel CBnT TOCTOU safe
Arthur Heymans
2021-05-28
1
-0
/
+10
*
cpu/intel/microcode: Fix caching logic in intel_microcode_find
Furquan Shaikh
2021-03-12
1
-1
/
+5
*
cpu/intel/microcode: Fix typo in function parameter
Elyes HAOUAS
2021-02-11
1
-1
/
+1
*
cpu/intel/microcode: Add caching layer in intel_microcode_find
Patrick Rudolph
2021-01-28
1
-1
/
+3
*
cpu/intel: add PC10 residency counter MSR
Michael Niewöhner
2021-01-07
1
-0
/
+2
*
cpu/intel/common: correct MSR for the Nominal Performance in CPPC
Michael Niewöhner
2020-10-31
1
-0
/
+2
*
cpu/intel/common: rework code previously moved to common cpu code
Michael Niewöhner
2020-10-24
1
-0
/
+1
*
{cpu,soc}/intel: deduplicate cpu code
Michael Niewöhner
2020-10-24
1
-0
/
+2
*
{cpu,soc}/intel: replace AES-NI locking by common implemenation call
Michael Niewöhner
2020-10-21
1
-0
/
+1
*
cpu/intel/common: rework AES-NI locking
Michael Niewöhner
2020-10-19
1
-1
/
+1
*
soc/intel/skl,cpu/intel: copy AES-NI locking to common cpu code
Michael Niewöhner
2020-10-19
1
-0
/
+11
*
src/include: Drop unneeded empty lines
Elyes HAOUAS
2020-09-14
4
-5
/
+0
*
src/include: Add missing includes
Elyes HAOUAS
2020-07-26
1
-0
/
+2
*
sb,soc/intel: Replace smm_southbridge_enable_smi()
Kyösti Mälkki
2020-06-16
1
-1
/
+0
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