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path: root/src/include/cpu/x86/mtrr.h
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* src/cpu/x86/mtrr/earlymtrr: Add clear_all_var_mtrrRaul E Rangel2020-04-291-0/+1
* Drop ROMCC code and header guardsArthur Heymans2019-12-191-3/+3
* include/cpu/x86/mtrr: Fix return typeElyes HAOUAS2019-07-071-2/+2
* cpu/x86/mtrr: Fix _FROM_4G_TOP() macroNico Huber2019-02-121-1/+1
* Revert "cpu/x86/mtrr: Fix sign overflow"Nico Huber2019-02-111-1/+1
* cpu/x86/mtrr: Fix sign overflowPatrick Rudolph2019-02-051-1/+1
* soc/intel/common: Bring DISPLAY_MTRRS into the lightNico Huber2018-11-231-0/+7
* cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067xArthur Heymans2018-07-301-0/+4
* cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans2018-07-241-2/+2
* cpu/x86/mtrr.h: Clean up some guardsNico Huber2018-06-041-13/+11
* cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiBNico Huber2018-05-311-4/+14
* cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDENico Huber2018-05-311-22/+25
* x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRsMarshall Dawson2018-02-161-0/+4
* cpu/x86/mtrr: fix fls() and fms() inline assemblyAaron Durbin2017-11-021-2/+2
* cpu/x86/mtrr: further expose declarations of functionsAaron Durbin2017-06-091-4/+2
* cpu/x86/mtrr: don't guard function declarationsAaron Durbin2017-06-051-4/+1
* src/include: Wrap lines at 80 columnsLee Leahy2017-03-131-1/+2
* src/include: Add space after minus signLee Leahy2017-03-131-1/+1
* src/include: Remove space after function nameLee Leahy2017-03-131-1/+1
* src/include: Remove spaces before tabsLee Leahy2017-03-121-4/+4
* src/include: Indent code using tabsLee Leahy2017-03-091-6/+6
* src/include: Fix unsigned warningsLee Leahy2017-03-091-1/+2
* cpu/x86/mtrr: allow temporary MTRR range during corebootAaron Durbin2016-11-121-0/+7
* cpu/x86: Move fls() and fms() to mtrr.hRizwan Qureshi2016-09-121-0/+27
* src/include: Capitalize CPU, RAM and ROMElyes HAOUAS2016-07-311-1/+1
* cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy2016-07-271-0/+13
* Ignore RAMTOP for MTRRsKyösti Mälkki2016-06-221-7/+5
* mtrr: Define a function for obtaining free var mtrrFurquan Shaikh2016-03-181-0/+1
* cpu/x86/mtrr: add helper function to detect variable MTRRsAaron Durbin2016-03-081-3/+9
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-151-43/+40
* Verify Kconfigs symbols are not zero for hex and int type symbolsMartin Roth2015-07-121-2/+2
* cpu/x86: Add more MTRR symbolsLee Leahy2015-06-241-0/+7
* x86 MTRR: Drop unused return valueKyösti Mälkki2014-06-301-1/+1
* Remove CACHE_ROM.Vladimir Serbinenko2014-02-251-23/+0
* x86/mtrr: don't assume size of ROM cached during CAR modeAaron Durbin2014-01-281-4/+0
* Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki2014-01-151-3/+31
* AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki2013-12-261-0/+4
* include: Fix spellingMartin Roth2013-07-111-2/+2
* mtrr: add rom caching comment about hyperthreadsAaron Durbin2013-04-051-1/+5
* x86: add rom cache variable MTRR index to tablesAaron Durbin2013-03-291-0/+3
* x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin2013-03-291-0/+16
* x86: add new mtrr implementationAaron Durbin2013-03-291-11/+23
* x86: unify amd and non-amd MTRR routinesAaron Durbin2013-03-221-0/+2
* Google Link: Add remaining code to support native graphicsRonald G. Minnich2013-03-151-0/+7
* Intel cpus: Extend cache to cover complete Flash DeviceKyösti Mälkki2012-07-041-0/+6
* Make MTRR min hole alignment 64MBDuncan Laurie2012-03-301-0/+3
* MTRR: get physical address size from CPUIDSven Schnelle2012-01-101-1/+1
* Remove XIP_ROM_BASEPatrick Georgi2011-11-011-11/+1
* Get rid of AUTO_XIP_ROM_BASEPatrick Georgi2011-10-281-12/+0
* more ifdef -> if fixesStefan Reinauer2011-04-211-1/+1
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