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path: root/src/include/device/dram/ddr3.h
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* include/device/dram: Add SPD lengths for DDR3 to DDR5Martin Roth2023-10-251-0/+3
* spd.h: Move enum ddr3_module_type to ddr3.hElyes Haouas2023-01-041-4/+1
* include/device/dram/ddr3.h: Don't redefine 'printram(x, ...)'Elyes HAOUAS2022-02-211-15/+0
* device/dram/ddr3: Drop unused MRS helpersAngel Pons2021-04-051-130/+0
* device/dram/ddr3: Rename DDR3 SPD memory typesAngel Pons2021-04-051-18/+18
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-051-9/+9
* src/include: Drop unneeded empty linesElyes HAOUAS2020-09-141-1/+0
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-261-2/+2
* src: Remove redundant includesElyes HAOUAS2020-06-021-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* src (minus soc and mainboard): Remove copyright noticesPatrick Georgi2020-03-171-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph2018-08-211-1/+4
* nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph2018-08-201-0/+2
* device/dram/ddr3: improve XMP supportDan Elkouby2018-04-161-0/+2
* device/ddr2,ddr3: Rename and move a few thingsArthur Heymans2018-02-221-34/+2
* device/dram/ddr3.h: Add brackets around macroArthur Heymans2017-06-221-1/+1
* haswell: add CBMEM_MEMINFO table when initing RAMMatt DeVillier2017-06-161-0/+13
* nb/intel/sandybridge: Improve CAS freq selectionArthur Heymans2017-06-121-0/+2
* src/include: Fix space between type, * and variable nameLee Leahy2017-03-131-3/+3
* device/dram/ddr2: Add common ddr2 spd decoderPatrick Rudolph2017-03-101-1/+1
* src/include: Indent code using tabsLee Leahy2017-03-091-2/+2
* src/include: Fix unsigned warningsLee Leahy2017-03-091-15/+15
* device/dram/ddr3: Calculate CRC16 of SPD unique identifierKyösti Mälkki2016-11-201-0/+1
* SPD: fix DDR3 SDRAM memory module typesElyes HAOUAS2016-06-241-2/+8
* include/device/dram/ddr3: Add additional frequenciesPatrick Rudolph2016-06-201-0/+4
* include/device/dram: Fix DDR3-1866Patrick Rudolph2016-03-051-1/+1
* src/device/dram/ddr3: Parse additional informationPatrick Rudolph2016-03-031-0/+4
* nb/intel/sandybridge/romstage: Read fuse bits for max MEM ClkPatrick Rudolph2016-03-021-1/+3
* nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph2016-02-201-0/+12
* header files: Fix guard name comments to match guard namesMartin Roth2016-01-181-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-3/+0
* Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth2015-07-121-1/+1
* device: DDR3 generic code 64bit fixStefan Reinauer2015-06-221-1/+1
* ddr3: Plumber DIMM type to parsed structure.Vladimir Serbinenko2014-12-071-0/+1
* sandy/ivybridge: Native raminit.Vladimir Serbinenko2014-07-291-0/+5
* device/dram/ddr3: Move CRC calculation in a separate functionAlexandru Gagniuc2013-12-171-0/+1
* include: Fix spellingMartin Roth2013-07-111-1/+1
* DDR3: Add utilities for creating MRS commandsAlexandru Gagniuc2013-06-041-0/+119
* dram: Add utilities for decoding DDR3 SPDsAlexandru Gagniuc2013-06-031-0/+189
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