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* SMBIOS: Remove duplicated smbios_memory_type enumElyes HAOUAS2018-11-162-31/+7
* src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS2018-11-122-3/+0
* include/program_loading: Add POSTCAR prog typePhilipp Deppenwiese2018-11-091-0/+1
* src: Replace common MSR addresses with macrosElyes HAOUAS2018-11-081-0/+1
* soc/intel/skylake: Add PCH sku id's supported for KBLPraveen hodagatta pranesh2018-11-081-0/+3
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+66
* intel: Get rid of smm_get_pmbasePatrick Rudolph2018-11-071-3/+0
* timer: Add wait_us/wait_ms helper macros to wait for conditionsJulius Werner2018-11-071-0/+34
* cpu/amd: Use common AMD's MSRElyes HAOUAS2018-11-051-0/+2
* amd/mtrr: Fix IORR MTRRElyes HAOUAS2018-11-051-14/+4
* src: Add missing include <stdint.h>Elyes HAOUAS2018-11-013-3/+10
* reset: Finalize move to new APINico Huber2018-10-311-10/+0
* src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS2018-10-302-189/+171
* {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS2018-10-301-0/+12
* drivers/spi: Winbond specific write-protection enablePatrick Rudolph2018-10-301-1/+57
* src: Add missing include <stdint.h>Elyes HAOUAS2018-10-302-0/+4
* selfboot: create selfboot_check function, remove check paramRonald G. Minnich2018-10-251-4/+7
* intel: Use CF9 reset (part 2)Patrick Rudolph2018-10-222-40/+0
* reset: Provide new single-function reset APINico Huber2018-10-221-1/+37
* cpu/amd: Use common AMD's MSRElyes HAOUAS2018-10-186-129/+53
* console/post_codes: Add post codes for memory param prep callbackFurquan Shaikh2018-10-181-0/+16
* soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh2018-10-171-0/+49
* src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS2018-10-114-16/+40
* selfboot: remove bounce buffersRonald G. Minnich2018-10-112-8/+0
* lib: increase part number size in memory_info/dimm_infoAaron Durbin2018-10-101-1/+1
* Move compiler.h to commonlibNico Huber2018-10-0817-51/+0
* smmstore: Add a key/val store facility in flash, mediated through SMMPatrick Georgi2018-10-081-0/+52
* src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS2018-10-051-1/+1
* soc/amd/stoneyridge: Add IOMMU supportMarc Jones2018-10-031-0/+1
* drivers/intel/wifi: Add DID for Intel WIFI module 8260, 8275Subrata Banik2018-10-011-0/+3
* src/*: normalize Google copyright headersPatrick Georgi2018-09-283-3/+3
* include/device/pnp.h: Don't use device_tElyes HAOUAS2018-09-211-18/+18
* ec/google/chromeec: Update google_chromeec_get_board_version prototypeKarthikeyan Ramasubramanian2018-09-201-0/+9
* drivers/spi: Read Winbond's flash protection bitsPatrick Rudolph2018-09-161-0/+26
* sconfig: Allow setting device status in device treeHung-Te Lin2018-09-161-0/+1
* nb/amd/pi/00730F01: Initialize IOMMU deviceKyösti Mälkki2018-09-151-0/+1
* complier.h: add __always_inline and use it in code baseAaron Durbin2018-09-147-35/+38
* complier.h: add __noreturn and use it in code baseAaron Durbin2018-09-104-5/+10
* amd/fam15: Add more MCA informationMarshall Dawson2018-09-071-0/+166
* include/cper.h: Add max of enumMarshall Dawson2018-09-071-0/+1
* src/include: Add CPER definitionsMarshall Dawson2018-09-061-0/+507
* src/include: Introduce guid_t typeMarshall Dawson2018-09-061-0/+42
* siemens/mc_apl1: Disable PCI clock outputs on XIO bridgeMario Scheithauer2018-08-271-0/+1
* device_tree/fit: Constify data structuresPatrick Rudolph2018-08-242-20/+24
* drivers/elog/elog.c: Create extended eventRichard Spiegel2018-08-221-1/+17
* lib/fit_payload: Add coreboot tables support for FDT.Philipp Deppenwiese2018-08-221-0/+2
* nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph2018-08-211-1/+4
* soc/intel/common/block: Add WHL 2-core SKUKrzysztof Sywula2018-08-201-1/+2
* nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph2018-08-201-0/+2
* src/include: add more msr definesMatt Delco2018-08-171-1/+7
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