summaryrefslogtreecommitdiffstats
path: root/src/mainboard/apple
Commit message (Expand)AuthorAgeFilesLines
* sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans2019-10-111-25/+1
* src/mainboard: Remove unused include <device/pci_ops.h>Elyes HAOUAS2019-09-161-1/+0
* src: Remove unneeded include <arch/interrupt.h>Elyes HAOUAS2019-09-111-1/+0
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+1
* mb,autoport: Fix GCC 9 Port_List build errorJacob Garber2019-08-201-2/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-7/+2
* mainboards: Remove floating __PRE_RAM__ commentsKyösti Mälkki2019-08-181-2/+0
* sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supportedPatrick Rudolph2019-07-191-1/+0
* mb/*/*/gpio: Use static for const structuresPeter Lemenkov2019-07-181-14/+14
* intel/945 boards: Use smp_write_pci_intsrc()Kyösti Mälkki2019-06-251-15/+15
* sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetreeArthur Heymans2019-06-211-4/+0
* src/mainboard: Remove unused include <arch/byteorder.h>Elyes HAOUAS2019-06-191-1/+0
* nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selectionElyes HAOUAS2019-06-141-1/+0
* sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans2019-06-061-1/+0
* mb/apple/macbookair4_2: Fix DRAM_RESET_GATE_GPIOEvgeny Zinoviev2019-06-041-1/+1
* src/mainboard: Remove unneeded include <arch/io.h>Elyes HAOUAS2019-05-151-1/+0
* mb/apple/macbookair4_2: Correct internal video port selectionEvgeny Zinoviev2019-05-071-1/+1
* src: Remove unused include <halt.h>Elyes HAOUAS2019-05-061-1/+0
* src/mb: Use system_reset()Elyes HAOUAS2019-04-291-2/+2
* src/mb/Kconfig: Fix PCI subsystem IDsElyes HAOUAS2019-04-191-8/+0
* sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-131-0/+1
* src: Use include <delay.h> when appropriateElyes HAOUAS2019-04-062-2/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-202-2/+0
* mb/(ICH7): Remove initialization already done at early_init.cElyes HAOUAS2019-03-181-2/+0
* src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>'Elyes HAOUAS2019-03-081-1/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-082-9/+9
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-043-3/+0
* arch/x86/acpi: Remove obsolete acpi_gen_regaddr resv fieldElyes HAOUAS2019-03-041-6/+2
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-012-0/+2
* cpu/intel: Rename socket_mFCPGA478 to socket_mNico Huber2019-02-282-2/+2
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-072-2/+0
* cpu/intel/model_206ax: Remove the notion of socketsArthur Heymans2019-01-242-4/+1
* mb/*/*/devicetree.cb: Make sandybridge devicetree uniformArthur Heymans2019-01-231-4/+2
* nb/intel/i945: Use parallel MP initArthur Heymans2019-01-232-2/+0
* mb/*/*: Use libgfxinit on sandy and ivy bridge boardsArthur Heymans2019-01-153-0/+38
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-4/+0
* sb/intel/i82801gx: Autodisable functions based on devicetreeArthur Heymans2019-01-081-4/+1
* src/mb/apple/macbookair4_2: move early_southbridge.c to romstage.cAngel Pons2019-01-063-79/+77
* mainboard: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-191-1/+0
* cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans2018-11-301-1/+1
* mb/*/*/Kconfig: Remove useless commentElyes HAOUAS2018-11-282-2/+2
* sb/intel/i82801gx: Use common Intel SMM codeArthur Heymans2018-11-271-1/+1
* mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS2018-11-232-4/+6
* ACPI: Fix DSDT's revision fieldElyes HAOUAS2018-11-212-2/+2
* src: Add required space after "switch"Elyes HAOUAS2018-11-191-1/+1
* src: Remove unneeded include <lib.h>Elyes HAOUAS2018-11-162-2/+0
* src: Get rid of duplicated includesElyes HAOUAS2018-11-161-1/+0
* mb/*/*: Harmonise FD and devicetree on boards featuring ICH7Arthur Heymans2018-11-121-0/+8
* intel/i945: Factor out ram init time stampsPaul Menzel2018-11-121-2/+0
* mainboard: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-052-2/+0