summaryrefslogtreecommitdiffstats
path: root/src/mainboard/asus/p5qpl-am
Commit message (Expand)AuthorAgeFilesLines
* sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans2019-10-111-5/+1
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-3/+1
* mb/*/*/gpio: Use static for const structuresPeter Lemenkov2019-07-181-7/+7
* sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans2019-06-061-1/+0
* src/mainboard: Remove unneeded include <arch/io.h>Elyes HAOUAS2019-05-151-1/+0
* src: Remove unused include <halt.h>Elyes HAOUAS2019-05-061-1/+0
* src/mb: Use system_reset()Elyes HAOUAS2019-04-291-2/+2
* sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-131-0/+1
* {mb,nb/pineview}/*.asl: Remove unneeded include i82801gx.hElyes HAOUAS2019-03-131-2/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* device/pnp: Add header files for PNP opsKyösti Mälkki2019-03-041-0/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* mb/{asrock,intel,kontron}: Include missing <arch/io.h>Elyes HAOUAS2019-02-081-8/+9
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-071-1/+0
* mb/asus/p5qpl-am: Add p5g41t-m_lx as a variantAngel Pons2019-01-149-95/+399
* mb: Move timestamp_add_now to northbridge x4xElyes HAOUAS2019-01-101-7/+0
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-3/+0
* sb/intel/i82801gx: Autodisable functions based on devicetreeArthur Heymans2019-01-081-2/+0
* src/mb/asus/p5qpl-am/romstage.c: Fix commentAngel Pons2019-01-071-1/+1
* arch/x86: Drop spurious arch/stages.h includesKyösti Mälkki2018-12-281-1/+0
* mb/asus/p5qpl-am: Add mainboardArthur Heymans2018-12-2419-0/+878
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-26 01:54:15 +0000