| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. | Philipp Hug | 2019-12-06 | 1 | -0/+1 |
| * | mb/qemu-riscv: update to match current qemu version | Philipp Hug | 2019-01-26 | 1 | -2/+4 |
| * | mb/emulation/spike-riscv: Implement mtime_init | Jonathan Neuschäfer | 2018-12-05 | 1 | -0/+4 |
| * | riscv: Unify SBI call implementations under arch/riscv/ | Jonathan Neuschäfer | 2016-11-07 | 1 | -3/+0 |
| * | riscv: Use the generic src/lib/bootblock.c | Jonathan Neuschäfer | 2016-10-15 | 1 | -1/+0 |
| * | spike-riscv: Look for the CBFS in RAM | Jonathan Neuschäfer | 2016-07-14 | 1 | -0/+3 |
| * | riscv-memlayout: fix existing memlayout issues, add sbi interface | Thaminda Edirisooriya | 2015-09-16 | 1 | -0/+3 |
| * | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner | 2015-04-06 | 1 | -0/+4 |
| * | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich | 2014-12-01 | 1 | -0/+19 |
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| Coreboot firmware sources | coreboot |
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