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path: root/src/mainboard/emulation/qemu-riscv
Commit message (Expand)AuthorAgeFilesLines
* riscv: Unify SBI call implementations under arch/riscv/Jonathan Neuschäfer2016-11-072-103/+0
* RISCV: Clean up the common architectural codeRonald G. Minnich2016-10-241-0/+1
* riscv: Use the generic src/lib/bootblock.cJonathan Neuschäfer2016-10-152-32/+0
* riscv: Clean up {qemu,spike}_utilJonathan Neuschäfer2016-10-151-124/+12
* riscv and power8: Convert printk/while(1) to dieJonathan Neuschäfer2016-10-151-2/+1
* qemu-riscv: Remove obsolete CSR - send_ipiMartin Roth2016-08-191-8/+1
* Kconfig: lay groundwork for not assuming SPI flash boot deviceAaron Durbin2016-08-181-0/+1
* arch/riscv: Add include/arch/barrier.hJonathan Neuschäfer2016-08-021-2/+3
* spike-riscv: Look for the CBFS in RAMJonathan Neuschäfer2016-07-142-0/+29
* Define RAMTOP for x86 onlyKyösti Mälkki2016-06-171-4/+0
* Add board URLs for the RISC-V boardsJonathan Neuschäfer2016-04-281-0/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-313-12/+0
* riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya2015-09-162-0/+221
* Remove empty lines at end of fileElyes HAOUAS2015-06-081-1/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-213-3/+3
* kconfig: automatically include mainboardsStefan Reinauer2015-04-181-0/+2
* uart: pass register width in the coreboot tableVadim Bendebury2015-04-171-0/+1
* CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner2015-04-141-12/+0
* New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner2015-04-063-24/+37
* bootblocks: use run_romstage()Aaron Durbin2015-03-201-12/+2
* romstages: use common run_ramstage()Aaron Durbin2015-03-201-8/+2
* RISCV: get RISCV to build againRonald G. Minnich2014-12-041-1/+0
* Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich2014-12-018-0/+306
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