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path: root/src/mainboard/emulation/spike-riscv
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* treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh2020-06-132-4/+4
* mb/emulation: Remove fake devicetree.cb componentsKyösti Mälkki2020-05-281-3/+0
* mainboard/*/*/*.cb: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* mainboard/*/*/Kconfig*: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-119-9/+0
* src/: Replace GPL boilerplate with SPDX headerPatrick Georgi2020-05-093-24/+3
* mainboard/emulation: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-046-79/+12
* mainboard/[a-f]*: Remove copyright noticesPatrick Georgi2020-03-189-10/+0
* fmap: Make FMAP_CACHE mandatory if it is configured inJulius Werner2019-12-111-1/+2
* mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.Philipp Hug2019-12-062-0/+7
* Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi2019-11-232-2/+1
* mb/emulation/*-riscv: Initialize cbmem in romstageArthur Heymans2019-11-011-0/+3
* src: Use 'include <boot/coreboot_tables.h>' when appropriateElyes HAOUAS2019-10-271-1/+0
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* riscv: Add initial support for 32bit boardsPhilipp Hug2019-02-131-0/+1
* mb/emulation/spike-riscv: Implement mtime_initJonathan Neuschäfer2018-12-052-0/+28
* mb/*/*/Kconfig: Remove useless commentElyes HAOUAS2018-11-281-1/+1
* Documentation/mainboard: Add emulation/spike-riscv.mdJonathan Neuschäfer2018-10-291-4/+0
* mainboard/: Select MISSING_BOARD_RESET appropriatelyNico Huber2018-10-221-0/+1
* mb/emulation/*-riscv: Remove "UCB" from RISC-V board namesJonathan Neuschäfer2018-10-062-8/+4
* mainboard: Get rid of device_t in ramstageElyes HAOUAS2018-06-091-1/+1
* src/mainboard: Add and update license headersMartin Roth2018-06-022-6/+6
* RISC-V boards: Remove PAGETABLES section from memlayout.ldJonathan Neuschäfer2018-04-271-1/+1
* util/riscvtools: Rename to util/riscv/Jonathan Neuschäfer2018-04-251-1/+1
* mb/emu/spike-riscv: Move usage instructions into Kconfig helpJonathan Neuschäfer2018-02-202-3/+5
* RISC-V boards: Stop using the config stringJonathan Neuschäfer2017-11-071-6/+4
* mb/emu/*-riscv: Remove outdated memory mapJonathan Neuschäfer2017-09-271-10/+0
* mb/emulation/spike-riscv: Update UART addressJonathan Neuschäfer2017-06-121-1/+1
* mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCVJonathan Neuschäfer2017-02-231-1/+0
* riscv/spike: Remove obsolete DRAM_SIZE_MB settingJonathan Neuschäfer2017-01-161-4/+0
* riscv: start to use the configstring functionsRonald G. Minnich2016-11-121-0/+6
* riscv: Unify SBI call implementations under arch/riscv/Jonathan Neuschäfer2016-11-073-104/+0
* RISCV: Clean up the common architectural codeRonald G. Minnich2016-10-241-1/+2
* riscv: Use the generic src/lib/bootblock.cJonathan Neuschäfer2016-10-152-31/+0
* riscv: Clean up {qemu,spike}_utilJonathan Neuschäfer2016-10-151-19/+0
* riscv and power8: Convert printk/while(1) to dieJonathan Neuschäfer2016-10-151-2/+1
* arch/riscv: Implement the SBI againJonathan Neuschäfer2016-08-231-13/+9
* Kconfig: lay groundwork for not assuming SPI flash boot deviceAaron Durbin2016-08-181-0/+1
* arch/riscv: Add include/arch/barrier.hJonathan Neuschäfer2016-08-021-0/+1
* spike-riscv: Look for the CBFS in RAMJonathan Neuschäfer2016-07-142-0/+33
* spike-riscv: Register RAM resource at 0x80000000Jonathan Neuschäfer2016-07-141-1/+9
* spike-riscv: Remove HTIF related codeJonathan Neuschäfer2016-07-121-103/+7
* riscv-spike: Move coreboot to 0x80000000 (2GiB)Jonathan Neuschäfer2016-06-211-6/+8
* Define RAMTOP for x86 onlyKyösti Mälkki2016-06-171-4/+0
* riscv-spike: Replace custom UART with a memory-mapped 8250Jonathan Neuschäfer2016-06-122-34/+2
* Add board URLs for the RISC-V boardsJonathan Neuschäfer2016-04-281-0/+1
* Fix "Spike RISCV" board nameJonathan Neuschäfer2016-04-281-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-313-12/+0
* riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya2015-09-162-136/+136
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