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path: root/src/mainboard/google/brya/variants/baseboard
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* mb/google/brya: Move gpio_pm settings for brya variants to baseboardsTim Wawrzynczak2022-01-122-0/+20
* mb/google/brya/var/brask: Change TPM I2C to I2C1Zhuohao Lee2022-01-072-15/+24
* mb/google/brya: Add new baseboard nissa with variants nivviks and nereidReka Norman2022-01-046-0/+116
* mb/google/brya/var/brask: Change I2C/DDC signalsRory Liu2022-01-031-12/+12
* mb/google/brya/var/brask: Add wake-on-lan functionRory Liu2021-12-201-2/+2
* mb/google/brya: add list of gpios to lockNick Vaccaro2021-12-071-0/+18
* mb/google/brya/var/baseboard/brask: Add power limits functionsAlan Huang2021-12-023-0/+191
* mb/google/brya: Move cr50 configuration to variantDavid Wu2021-11-222-14/+2
* mb/google/brya: Move EC_HOST_EVENT_USB_MUX wake event to S0ix onlyJoey Peng2021-11-191-1/+1
* mb/google/brya: Move typeC AUX configuration to variantEric Lai2021-11-171-2/+0
* Revert "mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 setting"David Wu2021-11-131-2/+2
* ChromeOS: Replace with or add <types.h>Kyösti Mälkki2021-11-112-2/+2
* mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6%Wisley Chen2021-11-092-0/+6
* mb/google/brask: add the mkbp deviceZhuohao Lee2021-11-021-0/+2
* mb/google/brya/var/brask: Correct the GPIO config of buzzerAlan Huang2021-10-291-2/+2
* mb/google/brask: Correct GPIO GPP_R6 and GPP_R7 settingDavid Wu2021-10-271-2/+2
* mb/*/brya/variants/brask: Enable dynamic GPIO PMMeera Ravindranath2021-10-041-11/+0
* mb/google/brya: Enable DDR4 SODIMM for braskDavid Wu2021-10-045-0/+52
* mb/google/brya: move MILLIWATTS_TO_WATTS macro in header fileSumeet Pawnikar2021-10-011-2/+0
* mb/google/brask: Correct SSD power sequenceEric Lai2021-10-011-2/+11
* mb/google/brask/var/baseboard/brask: Update GPIO GPP_B5 and GPP_B6David Wu2021-10-011-4/+4
* mb/google/brya: Update PCH power cycle related durationsTim Wawrzynczak2021-09-291-0/+6
* mb/google/brya: Correct SSD power sequenceEric Lai2021-09-271-0/+2
* mb/google/brya: Switch to using device pointers using alias namesFurquan Shaikh2021-09-201-7/+3
* mb/google/brya: Fix brya0 WWAN poweron sequencingTim Wawrzynczak2021-09-161-2/+6
* mb/google/brya: Update state of BB_RT_FORCE_PWR gpiosTim Wawrzynczak2021-09-162-2/+2
* mb/google/brya: Add support for romstage GPIO tableTim Wawrzynczak2021-09-155-1/+17
* mb/google/brya: Replace white space with tabSubrata Banik2021-09-112-14/+14
* mb/google/brya/variants: fix override values for power limitsSumeet Pawnikar2021-09-032-1/+4
* mb/google/brya: Fix Idle S0ix issue due to dynamic GPIO PM disabledMeera Ravindranath2021-09-021-11/+0
* mb/google/brya/variants/brask: Enable PCIE port 7 for EthernetDavid Wu2021-09-021-0/+8
* soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer2021-08-282-4/+0
* mb/google/brya: Fix PL4 limitsTim Wawrzynczak2021-08-251-1/+4
* mb/google/brya: set tcc_offset value to 10Sumeet Pawnikar2021-08-191-0/+2
* mb/google/brya: Add I2C parameterEric Lai2021-08-161-0/+15
* mb/google/brya: Configure EN_FCAM_PWR to highVarshit B Pandya2021-08-161-1/+1
* mb/google/brya: allow MKBP devices and disable TBMC deviceBoris Mittelberg2021-08-161-2/+2
* mb/google/brya: set PL4 value dynamically for thermalSumeet Pawnikar2021-08-152-2/+8
* mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cbMAULIK V VAGHELA2021-08-102-4/+0
* mb/*/brya/adlrvp: Remove hardcoding of BSP APIC IDMAULIK V VAGHELA2021-08-102-6/+4
* mb/google/brya: create dynamic power limits mechanism for thermalSumeet Pawnikar2021-08-093-0/+60
* mb/google/brya/variants/gimble: add TcssAuxOriScott Chao2021-08-051-0/+2
* mb/google/brya: Add RTD3 for WWANThejaswani Putta2021-08-031-0/+5
* mb/google/brya: Introduce new baseboard braskZhuohao Lee2021-08-036-0/+642
* mb/google/brya: Configure H21 as GPO and A17 as lowVarshit B Pandya2021-08-021-2/+2
* mb/google/brya: add BASEBOARD_DIR to support different baseboardZhuohao Lee2021-07-297-0/+0
* mb/google/brya: Deduplicate chipset lockdown configFelix Singer2021-07-261-1/+1
* mb/google/brya: Program Unused Cnvi BT related GPIOs to NCMaulik V Vaghela2021-07-211-0/+13
* mb/google/brya: Add variant specific soc chip config updateSugnan Prabhu S2021-07-211-0/+2
* Revert "mb/google/brya: Enable south XHCI ports 1 and 2"Tim Wawrzynczak2021-07-211-6/+0
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