| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mb/google/dedede: Remove Rcomp resistor and target values | Meera Ravindranath | 2020-07-27 | 1 | -6/+0 |
| * | src: Remove leading blank lines from SPDX header | Elyes HAOUAS | 2020-05-18 | 1 | -5/+1 |
| * | treewide: Remove "this file is part of" lines | Patrick Georgi | 2020-05-11 | 1 | -1/+0 |
| * | mb/google/dedede: Remove pad termination for RAM_STRAP_4 | Karthikeyan Ramasubramanian | 2020-05-01 | 1 | -0/+5 |
| * | soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC | Aamir Bohra | 2020-04-01 | 1 | -1/+1 |
| * | mainboard/google: Remove copyright notices | Patrick Georgi | 2020-03-18 | 1 | -1/+0 |
| * | mb/google/dedede: Add memory initialization support for dedede | Meera Ravindranath | 2020-03-03 | 1 | -0/+73 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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