summaryrefslogtreecommitdiffstats
path: root/src/mainboard/google/rambi
Commit message (Expand)AuthorAgeFilesLines
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-1818-54/+0
* src: Remove unused '#include <stdint.h>'Elyes HAOUAS2020-05-131-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-11122-122/+0
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-0918-162/+18
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-025-5/+5
* payloads/seabios: Add Hardware IRQ KconfigMatt DeVillier2020-05-021-0/+5
* mb/google/rambi: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-06104-1323/+208
* mb/google/rambi: use ACPI backlight controlsMatt DeVillier2020-04-053-0/+7
* mb/google/rambi: Disable console output by defaultMatt DeVillier2020-04-031-1/+4
* mb/google/rambi: Convert to use override devicetreeMatt DeVillier2020-04-0333-1561/+158
* Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber2020-04-021-1/+1
* mainboard/google: Remove copyright noticesPatrick Georgi2020-03-1870-72/+0
* chromeos: stop sharing write protect GPIO with depthchargeJoel Kitching2020-03-071-1/+0
* treewide: capitalize 'BIOS'Elyes HAOUAS2020-02-171-1/+1
* mb/**/dsdt.asl: Remove outdated sleepstates.asl commentAngel Pons2019-12-311-1/+0
* mb/**/dsdt.asl: Remove "Some generic macros" commentAngel Pons2019-12-211-1/+0
* src/mainboard: Remove unused '#include <device/pci.h>'Elyes HAOUAS2019-12-203-3/+0
* mb/*/{BiosCallOuts,mainboard,romstage}.c: Remove unused <device/pci_{def,ops}.h>Elyes HAOUAS2019-12-191-1/+0
* mb/google/rambi: add VBTs for variantsMatt DeVillier2019-12-1716-0/+1
* mainboard/google: Remove unused include <stdlib.h>Elyes HAOUAS2019-11-2816-16/+0
* Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi2019-11-231-1/+1
* ELOG: Introduce elog_gsmi variantsKyösti Mälkki2019-11-091-3/+1
* soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik2019-11-011-1/+1
* src: Use 'include <boot/coreboot_tables.h>' when appropriateElyes HAOUAS2019-10-271-1/+0
* mb/[google/intel]/*: Specify Chrome EC bus - LPC or ESPIMartin Roth2019-10-031-0/+1
* mb: remove test-only HWIDsHung-Te Lin2019-09-301-20/+0
* src/mainboard: Remove unused include <device/pci_ops.h>Elyes HAOUAS2019-09-161-1/+0
* google/rambi,intel/baytrail: Simplified romstage flowKyösti Mälkki2019-08-281-14/+8
* mb/google/rambi: update GPIO, RAM config for clapperMatt DeVillier2019-08-234-40/+46
* arch/x86: Rename some mainboard_romstage_entry()Kyösti Mälkki2019-08-211-1/+1
* google/rambi: Replace __PRE_RAM__ with ENV_ROMSTAGEKyösti Mälkki2019-08-191-3/+2
* mainboard/google: Remove use of __PRE_RAM__Kyösti Mälkki2019-08-191-4/+1
* arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-classKyösti Mälkki2019-07-091-1/+1
* soc/intel/baytrail: set default VBIOS filename and PCI IDMatt DeVillier2019-06-021-4/+0
* google/clapper: fix up devicetreeMatt DeVillier2019-05-291-5/+14
* mb/google/{misc}: set default SMBIOS manufacturerMatt DeVillier2019-05-291-0/+4
* src/mainboard/google: Adopt Mainboards to changed Type41 FuncChristian Walter2019-05-231-2/+4
* mainboard: remove "recovery" gpio, selectively add "presence" gpio.Matt Delco2019-05-131-1/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-206-6/+0
* src: Drop unused 'include <arch/acpigen.h>'Elyes HAOUAS2019-03-121-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-084-7/+7
* mainboard: Enable PRESERVE flag in all vboot/chromeos FMD filesHung-Te Lin2019-03-051-4/+4
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-012-0/+2
* ACPI: Rename FADT model and set it to zeroElyes HAOUAS2019-03-011-1/+1
* ACPI: Correct asl_compiler_revision valueElyes HAOUAS2019-02-211-1/+2
* google/rambi: disable TXE in devicetree for all variantsMatt DeVillier2018-12-1916-16/+16
* mainboard: Remove useless include <device/pci_ids.h>Elyes HAOUAS2018-12-191-1/+0
* cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans2018-11-301-1/+1
* mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS2018-11-231-2/+3