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* mainboard/google/skyrim/baseboard: Enable Wake-On-LAN functionalityRobert Zieba2022-07-201-2/+4
| | | | | | | | | | | | | | | | The generic wifi driver currently contains a lot of intel-specific functionality that interferes with enabling wake-on-lan. This commit changes the device tree to use the generic PCIe driver which better supports this functionality. BUG=b:237682766 TEST=Booted on skyrim device and verified that wake on LAN works Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I5d15d33fd0a152eb3bf2bfe78e802483a701e750 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65800 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Add SoC thermal zoneFred Reitberger2022-06-281-0/+54
| | | | | | | | | | | | | | | The temperature values were taken from guybrush as a starting point for skyrim. BUG=b:230428864 TEST=Boot skyrim to OS and verify thermal zones are populated and working in /sys/class/thermal/ Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I6669b32f5e3dd63c6523f74166089eb4eb2d7848 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim/variants/baseboard: enable iommuJason Glenesk2022-06-221-0/+1
| | | | | | | | | | | | | | | | | | With IOMMU disabled, kernel complains that 'IOMMUv2 functionality not available on this system'. Enable iommu in devicetree for skyrim proto board in order to allow kernel to load and initialize IOMMUv2. BUG=b:232750390 TEST=Boot to Chrome OS on skyrim board, and grep dmesg for "AMD IOMMUv2 loaded and initialized" Change-Id: I2f10f5eda8083335619a34c44df253b8e5a8572c Signed-off-by: Jason Glenesk <Jason.Glenesk@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
* mb/google/skyrim: Add ACPI _PLD custom valuesWon Chung2022-06-071-4/+8
| | | | | | | | | | | | | | | | | | | | | | | This patch uses ACPI _PLD macros to add custom values for USB ports. +----------------+ | | | Screen | | | +----------------+ C0 | | C1 A0 | MLB DB | | | +----------------+ BUG=b:232298017 TEST=None Signed-off-by: Won Chung <wonchung@google.com> Change-Id: Idca3dd468f1b9fde37a1bbf20d65768032c7160b Reviewed-on: https://review.coreboot.org/c/coreboot/+/64875 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
* mb/google/skyrim/baseboard/devicetree: enable S0ixFelix Held2022-05-241-0/+2
| | | | | | | | | Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia6c5b3f83b66a2d54611ada3cb97ddda4b655d00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64606 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/gogle/skyrim/devicetree: enable display HDA deviceFelix Held2022-05-211-0/+1
| | | | | | | | | | | The HD audio controller of the GPU on bus A device 0 function 1 wasn't enabled, so it didn't get resources assigned. Enable it to fix this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib9a4129ce594c5dd59f70e855fef5f2c04ebb9c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64554 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/gogle/skyrim/devicetree: enable audio coprocessor deviceFelix Held2022-05-211-0/+1
| | | | | | | | | | | The ACP device on bus A device 0 function 5 wasn't enabled, so it didn't get resources assigned. Enable the ACP device to fix this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifc9376314213e9d624756519f703d508411cb1bb Reviewed-on: https://review.coreboot.org/c/coreboot/+/64553 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/gogle/skyrim/devicetree: enable crypto deviceFelix Held2022-05-211-0/+1
| | | | | | | | | | | | | | | | | | | | The crypro device on bus A device 0 function 2 wasn't enabled, so it didn't get resources assigned resulting in this the Linux kernel error: [ 38.582036] pci 0000:04:00.2: attach allowed to drvr ccp [internal device] [ 38.582064] ccp 0000:04:00.2: enabling device (0000 -> 0002) [ 38.582175] ccp 0000:04:00.2: ioremap failed [ 38.582178] ccp 0000:04:00.2: initialization failed [ 38.582181] ccp: probe of 0000:04:00.2 failed with error -12 Enable the crypto device to fix this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia812df6e59f3767dcbaa908fa620b62619590f85 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64552 Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim/var/skyrim: Add better descriptors for USB endpointsJon Murphy2022-05-201-4/+4
| | | | | | | | | | | | | | Fix descriptors for USB ports to align with their function and placement with respect to the schematics. BUG=N/A TEST=Builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: If57bebf9bffd4616c437ec655b64cab3298ac08e Reviewed-on: https://review.coreboot.org/c/coreboot/+/64530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim/var/skyrim: Add VL822 USB hubKarthikeyan Ramasubramanian2022-05-121-12/+0
| | | | | | | | | | | | | | | | In Skyrim, USB-A port and WWAN modules are connected to the SoC USB ports through an external hub. Update the USB configuration in the devicetree accordingly. Enable the ACPI driver for external USB hub. BUG=b:227761300 TEST=Build and boot to OS in Skyrim. Ensure that the hub and USB-A ports are enumerated correctly in the output of lusub command. Change-Id: Ibf6a3da8add7361fc50adcf7c62e46df234685dc Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63586 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Fix eSPI configurationJon Murphy2022-04-271-1/+1
| | | | | | | | | | | | | | | | | * Use GPE 24 since it doesn't conflict with any existing GEVENTS. * Remove IRQ 12 mapping since it's not used. * Unmask IRQ1 in PM registers. * Use the new SMITYPE_ESPI_SCI_B SCI. BUG=b:227282870 TEST=Build and boot to OS in Skyrim. Signed-off-by: Jon Murphy <jpmurphy@google.com> Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I7e9816d67500365ed1d2ee39ef184a1f60321ca1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63704 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/skyrim/var/baseboard: Set Clk request for WLAN/SD/SSD deviceChris.Wang2022-04-061-0/+6
| | | | | | | | | | | | | | | | | Setting the clock source depends on clock request pin for WLAN/SD/SSD device. Also turn off the unused (CLKREQ#3) clock sources.In skyrim, clock source 0/1/2 are routed for WLAN/SD/SSD device. BUG=b:227297986 BRANCH=none TEST=Build Signed-off-by: Chris.Wang <chris.wang@amd.corp-partner.google.com> Change-Id: I21fb912b69f59717eb4e84c379f706a0257a9ed1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* mb/google/skyrim: Fix ESPI communication issuesKarthikeyan Ramasubramanian2022-04-021-2/+2
| | | | | | | | | | | | | | | | | | | | * Use dedicated ALERT pin to resolve NO_RESPONSE error/status while getting target configuration. * Configure the ESPI to operate at 16 MHZ since operating at 33 MHz causes boot stall. BUG=b:226635441 TEST=Build and Boot to OS in Skyrim. Ensure that EC <-> AP communication is working fine through Host Command debug logs in EC console, ectool version command. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I951afdada8ee4f917cdeba8e287e5a2ae77c97ee Reviewed-on: https://review.coreboot.org/c/coreboot/+/63286 Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Add DXIO descriptorsJon Murphy2022-03-271-2/+1
| | | | | | | | | | | | | | Add Skyrim DXIO descriptors using info from AMD and skyrim bouard shematics. BUG=b:225179599 TEST=Boots to OS on Skyrim Board Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* mb/google/skyrim/devicetree: set PSPP policy to DXIO_PSPP_DISABLEDFelix Held2022-03-191-0/+2
| | | | | | | | | | | | | | Right now, the PSPP policy that controls if the PCIe lanes can be dynamically downgraded to a lower speed to save some power needs to be disabled in order for the link training to be successful. Once this feature is working, PSPP will be reenabled. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6ea602596acb8e5ea92076386e80102c3bc757af Reviewed-on: https://review.coreboot.org/c/coreboot/+/62924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jon Murphy <jpmurphy@google.com>
* mb/google/skyrim: Fix I2C voltagesRaul E Rangel2022-03-181-0/+6
| | | | | | | | | | | | | | | Needed so i2c communication works. BUG=b:224618411 TEST=build skyrim Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I8ec7c18cae509b5683cb73153fd6d3747cf9d753 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62874 Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/googe/skyrim/baseboard/devicetree: update USB port device ID on xhci2Felix Held2022-03-141-1/+1
| | | | | | | | | | | | | The one USB2 port on the XHCI2 controller should have the port ID 2.0, since it's the first USB2 port on that XHCI controller. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4a370132960939bccec4eb69a6590d0880b04137 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62713 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Configure WLANJon Murphy2022-03-101-1/+6
| | | | | | | | | | | | | | Configure PCIe Clk Source and Clk Request mapping. Configure GPIOs used for WLAN. Mappping derived from Skyrim schematic. BUG=b:214412172 TEST=Builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I16e35b443f741d366589fefb7fd21863369d1ec2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62165 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/skyrim: Enable PCIe devices in devicetreeJon Murphy2022-02-281-0/+5
| | | | | | | | | | | BUG=b:214414301 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I6b12950843f3ee3b5abe4ef9c6bd5aba528cc4ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/62164 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim: Enable AP <-> D2 communicationJon Murphy2022-02-281-1/+8
| | | | | | | | | | | | | | | | Configure D2 I2C and Interrupt GPIOs during the early initialization. Add devicetree configuration for D2 device and enable the required config items. BUG=b:214414776 TEST=Build Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I57b6d0e9da9935596e54b8eab400440e518b4523 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62163 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/skyrim: Add eSPI configurationJon Murphy2022-02-281-0/+38
| | | | | | | | | | | BUG=b:214413613 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: If1177dda705738222ce7f6f42dceafb14d37c98c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62162 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim: Add initial I2C configurationJon Murphy2022-02-281-0/+7
| | | | | | | | | | | | | | Add I2C peripheral reset configuration required during early init. Enabled I2C generic and HID drivers. BUG=b:214414677 TEST=Build Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I06e564cf6eca844101d70ff865f3074b45a55d55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/skyrim: Add ACPI configuration for USB portsJon Murphy2022-02-281-2/+71
| | | | | | | | | | | | | | | | | | | The USB port configuration was derived from the PPR and schematics. This board has 6(some multi-purpose) ports. Primary functions are: 2 USB-C ports 1 USB SS+ type A port 2 Cameras 1 Bluetooth transceiver BUG=b:214413631 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Ie1b05f190f25dca1566e1023011cc70c2d32f461 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim: Enable USB controllers in devicetreeJon Murphy2022-02-261-0/+4
| | | | | | | | | | | BUG=b:214413631 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I9ca2c16d97e064b32400356e1de37f3f70155a07 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62152 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Enable internal graphicsJon Murphy2022-02-261-0/+3
| | | | | | | | | | | | BUG=b:214416935 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: Icc71b114bf9d8f70ae38a876eedc9d1c3c02169c Reviewed-on: https://review.coreboot.org/c/coreboot/+/62151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* mb/google/skyrim: Enable console UARTJon Murphy2022-02-261-0/+1
| | | | | | | | | | | | BUG=b:214414501 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I053909ab73c1aa053f35a505b37571ff23adde89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* mb/google/skyrim: Enable Chrome ECJon Murphy2022-02-261-0/+5
| | | | | | | | | | | | BUG=b:214413613 TEST=builds BRANCH=none Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I15c7c482c4a5ddef22a221794b9ef03f9b7ffe05 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62046 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mb/google/skyrim: Add new mainboardKarthikeyan Ramasubramanian2022-02-031-0/+5
Skyrim is a new Google mainboard with AMD Sabrina SOC. BUG=b:214413553 TEST=util/abuild/abuild -t GOOGLE_SKYRIM --clean Change-Id: I008fea4aa163b8aa66e86735b29b3fdc4e08a327 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jon Murphy <jpmurphy@google.com>
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