| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | google/veyron_rialto: Add lpddr3-K4E6E304EB-2GB-1CH memory configuration | Jeffy Chen | 2016-10-06 | 1 | -0/+90 |
| * | Add newlines at the end of all coreboot files | Martin Roth | 2016-08-01 | 1 | -1/+1 |
| * | veyron: The ODT function is disabled for LPDDR3 | jinkun.hong | 2015-04-21 | 1 | -1/+1 |
| * | veyron: Add veyron_rialto board | jinkun.hong | 2015-04-15 | 2 | -0/+80 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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