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path: root/src/mainboard/intel/adlrvp/memory.c
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* mb/intel/adlrvp_n: Add support for ADL-N LP5 RVPKrishna Prasad Bhat2021-12-231-0/+64
* mb/intel/adlrvp: Fix sagv point3 clipping to 4800MhzBora Guvendik2021-11-171-2/+2
* mb/google,intel: Fix indirect include bootmode.hKyösti Mälkki2021-11-051-0/+1
* mb/intel/adlrvp: Update Rcomp target value for DDR4 RVP SKUSubrata Banik2021-09-301-2/+2
* mb/intel/adlrvp: Add board id for MR DDR5 SKUDeepti Deshatty2021-06-141-1/+2
* mb/intel/adlrvp: Fill CmdMirror and DqDqsRetraining for ADLRVPMaulik V Vaghela2021-05-121-0/+12
* mb/intel/adlrvp_m: Enable ADL-M RVP LP5 memory configurationMaulik V Vaghela2021-03-281-0/+62
* mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configurationMaulik V Vaghela2021-03-281-0/+58
* soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik2021-03-261-13/+16
* soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik2021-03-261-4/+4
* mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17Subrata Banik2021-02-221-1/+2
* src: Remove unused <arch/cpu.h>Elyes HAOUAS2021-02-111-2/+2
* soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driverFurquan Shaikh2021-01-251-42/+114
* mb/intel/adlrvp: Add support for LPDDR5Sridhar Siricilla2020-12-011-0/+30
* mb/intel/adlrvp: Refactor lpddr4_mem_config structureSubrata Banik2020-12-011-19/+9
* mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVPSubrata Banik2020-11-291-2/+2
* mb/intel/adlrvp: Replace if-else-if ladder with switch constructSridhar Siricilla2020-11-091-5/+9
* mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik2020-11-081-0/+83
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