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* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-1/+2
* pineview boards: Factor out MAX_CPUSAngel Pons2020-06-151-4/+0
* mainboard/*/*/Kconfig*: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1111-11/+0
* src/mainboard: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-101-13/+1
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-092-18/+2
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-022-2/+2
* mb/intel/d510mo: Add vbt fileArthur Heymans2020-04-092-0/+1
* mainboard/intel: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-067-91/+14
* mainboard/[g-p]*: Remove copyright noticesPatrick Georgi2020-03-1811-14/+0
* mb/*/*/acpi_tables: Remove unused includesElyes HAOUAS2020-01-021-1/+0
* mb/**/dsdt.asl: Remove outdated sleepstates.asl commentAngel Pons2019-12-311-1/+0
* mb/*/*/early_init.c: Remove defined but not used macroElyes HAOUAS2019-12-271-1/+0
* src/mainboard: Remove unused '#include <device/pci.h>'Elyes HAOUAS2019-12-201-1/+0
* mb/*/{BiosCallOuts,mainboard,romstage}.c: Remove unused <device/pci_{def,ops}.h>Elyes HAOUAS2019-12-191-1/+0
* Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi2019-11-231-1/+1
* mb/*/*{i82801gx}: Use sb/intel/common/acpi/platform.aslArthur Heymans2019-11-042-29/+1
* soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik2019-11-011-1/+1
* src/mainboard: Remove unused include <device/pci_ops.h>Elyes HAOUAS2019-09-161-1/+0
* sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans2019-06-061-1/+0
* nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans2019-05-252-1/+4
* src/mainboard/{foxconn/d41s,intel/d510mo}: Use pci_or_configArthur Heymans2019-04-231-2/+1
* src/mainboard/*/*/cstates.c: Drop unused includesElyes HAOUAS2019-03-131-1/+0
* src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>'Elyes HAOUAS2019-03-081-1/+1
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-071-1/+0
* nb/intel/pineview: Use parallel MP initArthur Heymans2019-01-231-1/+0
* nb/intel/pineview: Move the boilerplate mainboard_romstage_entryArthur Heymans2019-01-141-95/+8
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-4/+0
* sb/intel/i82801gx: Autodisable functions based on devicetreeArthur Heymans2019-01-081-3/+1
* mb/{d41s,d510mo}: Remove references to PCIe port 5 and 6Arthur Heymans2019-01-081-1/+0
* arch/x86: Drop spurious arch/stages.h includesKyösti Mälkki2018-12-281-1/+0
* mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS2018-11-231-2/+3
* ACPI: Fix DSDT's revision fieldElyes HAOUAS2018-11-211-1/+1
* mb/*/*: Harmonise FD and devicetree on boards featuring ICH7Arthur Heymans2018-11-121-1/+4
* src/mainboard/*/*: Set Mini-ITX boards' category to "mini"Angel Pons2018-09-131-1/+1
* nb/intel/pineview: Use a common MMCONF_BASE_ADDRESSArthur Heymans2018-08-211-4/+0
* mb/*/*/cmos.default: Decrease debug_level to 'Debug'Elyes HAOUAS2018-08-151-1/+1
* src/mb: Remove some unneeded includesElyes HAOUAS2018-08-131-1/+0
* sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tablesArthur Heymans2018-06-291-72/+0
* mainboard: Get rid of device_tElyes HAOUAS2018-06-091-1/+1
* mb/intel: Get rid of device_tElyes HAOUAS2018-05-081-1/+1
* mb/*/*/cmos.layout: Fix the values for the console levelArthur Heymans2018-01-261-9/+9
* cpu/intel/speedstep: Fix the PNOT ACPI methodArthur Heymans2018-01-171-1/+1
* mb/*/*/romstage.c: Clean up targets with i82801gxArthur Heymans2018-01-141-27/+17
* mb/*/*: Remove rtc nvram configurable baud rateArthur Heymans2017-09-232-10/+1
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