summaryrefslogtreecommitdiffstats
path: root/src/mainboard/intel/d945gclf
Commit message (Expand)AuthorAgeFilesLines
* mb/{i945,ich7}: Remove redundant write on V0CTLElyes HAOUAS2019-11-171-3/+0
* nb/intel/i945: Initialize console in bootblockArthur Heymans2019-11-152-1/+4
* nb/intel/i945: Move boilerplate romstage to a common locationArthur Heymans2019-11-151-50/+2
* sb/intel/i82801gx: Add common early codeArthur Heymans2019-11-141-35/+1
* sb/intel/i82801gx: Add common LPC decode codeArthur Heymans2019-11-122-14/+3
* soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik2019-11-011-1/+1
* mb/(ich7): Use macro instead of magic numberElyes HAOUAS2019-10-271-4/+4
* sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans2019-10-111-25/+1
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-1/+1
* cpu/intel: Enter romstage without BISTKyösti Mälkki2019-08-181-7/+2
* mainboards: Remove floating __PRE_RAM__ commentsKyösti Mälkki2019-08-181-2/+0
* mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`4.10Nico Huber2019-07-201-1/+0
* nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selectionElyes HAOUAS2019-06-141-1/+0
* sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans2019-06-061-1/+0
* mb/*/devicetree.cb: Remove unavailable PCIe portsArthur Heymans2019-06-051-2/+0
* sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph2019-04-131-0/+1
* nb/intel/i945: Use DEBUG_RAM_SETUPKyösti Mälkki2019-03-241-3/+2
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* mb/(ICH7): Remove initialization already done at early_init.cElyes HAOUAS2019-03-181-1/+0
* src/mainboard/*/*/cstates.c: Drop unused includesElyes HAOUAS2019-03-131-1/+0
* src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>'Elyes HAOUAS2019-03-081-1/+1
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-071-1/+0
* nb/intel/i945: Use parallel MP initArthur Heymans2019-01-232-2/+0
* cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans2019-01-091-5/+0
* sb/intel/i82801gx: Autodisable functions based on devicetreeArthur Heymans2019-01-081-5/+1
* mb/{ga-g41m-es2l,d945gclf,rk886ex}: Fix devicetreeArthur Heymans2019-01-081-1/+1
* mb/*/*/Kconfig: Remove useless commentElyes HAOUAS2018-11-281-1/+1
* mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS2018-11-231-2/+3
* ACPI: Fix DSDT's revision fieldElyes HAOUAS2018-11-211-1/+1
* mb/*/*: Harmonise FD and devicetree on boards featuring ICH7Arthur Heymans2018-11-121-10/+9
* intel/i945: Factor out ram init time stampsPaul Menzel2018-11-121-2/+0
* mainboard: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-051-1/+0
* src/mainboard/*/*: Set Mini-ITX boards' category to "mini"Angel Pons2018-09-131-1/+1
* mb/*/*/cmos.default: Decrease debug_level to 'Debug'Elyes HAOUAS2018-08-151-1/+1
* mb/intel/d945gclf/romstage.c: Remove unneeded includesElyes HAOUAS2018-07-061-6/+1
* sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tablesArthur Heymans2018-06-291-81/+0
* drivers/intel/gma: Unify VBT related Kconfig namesNico Huber2018-06-121-1/+1
* mb/*/*/acpi_tables.c: Remove unneeded includesElyes HAOUAS2018-06-111-12/+2
* mb/*/*: Add a few VBT filesArthur Heymans2018-06-062-0/+1
* mb/intel: Get rid of whitespace before tabElyes HAOUAS2018-06-042-11/+11
* mb/*/*/cmos.layout: Fix the values for the console levelArthur Heymans2018-01-261-9/+9
* cpu/intel/speedstep: Fix the PNOT ACPI methodArthur Heymans2018-01-171-1/+1
* mb/*/*/romstage.c: Clean up targets with i82801gxArthur Heymans2018-01-141-20/+16
* mb/*/*: Remove rtc nvram configurable baud rateArthur Heymans2017-09-232-10/+1
* Update files with no newline at the endMartin Roth2017-07-241-1/+1
* nb/intel/i945: Define and use a default MMCONF_BASE_ADDRESSArthur Heymans2017-05-111-4/+0
* nb/intel/i945: Move INTEL_EDIDPatrick Rudolph2017-04-071-1/+0
* sb/ich7: Use common/gpio.h to set up GPIOsArthur Heymans2017-01-063-17/+123