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path: root/src/mainboard/intel/dcp847ske/romstage.c
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* mb/*: Update SPD mapping for sandybridge boardsKeith Hui2023-11-131-5/+0
* SNB+MRC boards: Migrate MRC settings to devicetreeKeith Hui2023-10-251-35/+5
* nb/intel/snb: Abolish mainboard_should_reset_usb()Keith Hui2023-03-231-5/+0
* arch/x86: consolidate HPET base address definitionsFelix Held2022-02-251-1/+2
* Rename ECAM-specific MMCONF KconfigsShelley Chen2021-11-101-1/+1
* sandybridge MRC boards: Drop channel disable masksAngel Pons2021-02-121-6/+0
* nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessorsAngel Pons2021-02-101-3/+3
* nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons2020-09-171-2/+2
* nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macroAngel Pons2020-09-171-1/+1
* sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons2020-07-201-1/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* mainboard/intel: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-14/+2
* mainboard/[g-p]*: Remove copyright noticesPatrick Georgi2020-03-181-3/+0
* nb/intel/sandybridge: Drop pch.h from sandybridge.hPatrick Rudolph2019-04-231-0/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* intel/dcp847ske: Add Intel NUC DCP847SKETobias Diedrich2017-12-221-0/+69