coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/intel/x4x: Remove apic 0 from devicetree	Arthur Heymans	2022-12-05	1	-6/+1
*	cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm	Arthur Heymans	2022-12-05	1	-3/+0
*	nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree	Arthur Heymans	2022-12-01	1	-2/+4
*	sb/intel/i82801jx/sata.c: Drop always-false is_mobile check	Angel Pons	2020-08-12	1	-1/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	src/mainboard: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS	2020-05-10	1	-13/+1
*	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi	2020-03-18	1	-2/+0
*	mb/intel/dg43gt: Make devicetree prettier	Angel Pons	2020-01-10	1	-42/+40
*	sb/intel/i82801jx: Add common code for LPC decode	Arthur Heymans	2019-11-12	1	-0/+3
*	mb/intel/dg43gt: Program the subsystemid	Arthur Heymans	2019-01-03	1	-0/+1
*	mb/intel/dg43gt/devicetree.cb: Use tabs over spaces	Elyes HAOUAS	2018-04-11	1	-6/+6
*	mb/intel/dg43gt: Set SuperIO gpio correctly	Arthur Heymans	2017-09-23	1	-5/+9
*	mb/intel/dg43gt: Configure clockgen	Arthur Heymans	2017-09-12	1	-1/+13
*	mb/intel/dg43gt: Add mainboard	Arthur Heymans	2017-08-10	1	-0/+110