index
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coreboot.git
24.02_branch
4.1
4.10_branch
4.11_branch
4.12_branch
4.14_branch
4.15_branch
4.16_branch
4.18_branch
4.19_branch
4.2
4.20_branch
4.22_branch
4.3
4.4
4.8_branch
classic-2014.10
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path:
root
/
src
/
mainboard
/
intel
/
emeraldlake2
/
devicetree.cb
Commit message (
Expand
)
Author
Age
Files
Lines
*
sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported
Patrick Rudolph
2019-07-19
1
-1
/
+0
*
sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree
Arthur Heymans
2019-06-21
1
-1
/
+4
*
cpu/intel/model_206ax: Remove the notion of sockets
Arthur Heymans
2019-01-24
1
-3
/
+1
*
mb/*/*/devicetree.cb: Make sandybridge devicetree uniform
Arthur Heymans
2019-01-23
1
-1
/
+1
*
igd.asl rewrite
Vladimir Serbinenko
2015-05-28
1
-0
/
+3
*
sandy/ivy/nehalem: Remerge interrupt handling
Vladimir Serbinenko
2014-11-23
1
-9
/
+0
*
bd82x6x: Move to common FADT.
Vladimir Serbinenko
2014-11-08
1
-0
/
+3
*
ibexpeak / bd82x6x: Make SATA mode user-visible option.
Vladimir Serbinenko
2014-01-12
1
-2
/
+0
*
sconfig: rename lapic_cluster -> cpu_cluster
Stefan Reinauer
2013-02-14
1
-1
/
+1
*
sconfig: rename pci_domain -> domain
Stefan Reinauer
2013-02-14
1
-1
/
+1
*
Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.
Gabe Black
2012-05-01
1
-1
/
+3
*
Add support for Intel Emerald Lake 2 CRB
Stefan Reinauer
2012-04-30
1
-0
/
+82