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path: root/src/mainboard/intel/jasperlake_rvp
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* soc/intel/jasperlake: Add per-SKU power limitsChia-Ling Hou2023-06-231-1/+26
* mb/intel/jasperlake_rvp/Makefile.inc: Remove path to non-existent directoryElyes Haouas2023-01-121-1/+0
* mb/**/dsdt.asl: Drop misleading "OEM revision" commentAngel Pons2022-08-161-1/+1
* mb/**/dsdt.asl: Drop superfluous commentsAngel Pons2022-08-161-4/+0
* treewide: Unify Google brandingJon Murphy2022-07-041-1/+1
* mainboard/**/devicetree.cb: Fix typoAngel Pons2022-05-171-1/+1
* ChromeEC boards: Drop `IGNORE_IASL_MISSING_DEPENDENCY`Angel Pons2022-04-201-3/+0
* ChromeOS: Add DECLARE_x_CROS_GPIOS()Kyösti Mälkki2022-04-071-5/+1
* ChromeOS: Promote variant_cros_gpio()Kyösti Mälkki2022-04-062-13/+0
* mb/**/Kconfig: Properly override `IGNORE_IASL_MISSING_DEPENDENCY`Angel Pons2022-01-311-4/+3
* IASL: Ignore IASL's "Missing dependency" warningElyes HAOUAS2022-01-281-0/+4
* soc/intel/jsl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-141-0/+3
* mb: Add space before closing comment block keywordPaul Menzel2021-12-231-1/+1
* ChromeOS: Refactor ACPI CNVS generationKyösti Mälkki2021-12-231-7/+0
* ChromeOS: Replace with or add <types.h>Kyösti Mälkki2021-11-112-1/+2
* ChromeOS: Fix <vc/google/chromeos/chromeos.h>Kyösti Mälkki2021-11-091-0/+1
* mb/google,intel: Fix indirect include bootmode.hKyösti Mälkki2021-11-051-0/+1
* mb/intel/jasperlake_rvp: Rework KconfigFelix Singer2021-10-202-15/+21
* src/*: Specify type of `DIMM_SPD_SIZE` onceAngel Pons2021-09-031-1/+0
* soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer2021-08-281-1/+0
* mb/*/jslrvp/dedede: Remove hardcoding of BSP APIC IDMAULIK V VAGHELA2021-08-091-3/+1
* mb/*: Specify type of `VARIANT_DIR` onceAngel Pons2021-07-261-1/+0
* mb/*: Specify type of `DEVICETREE` onceAngel Pons2021-07-261-1/+0
* mb/*: Specify type of `MAINBOARD_PART_NUMBER` onceAngel Pons2021-07-261-1/+0
* mb/*: Specify type of `MAINBOARD_DIR` onceAngel Pons2021-07-261-1/+0
* soc/intel/jasperlake: Set xHCI LFPS period sampling off timeBen Kao2021-07-261-0/+3
* dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak2021-04-131-1/+0
* vboot: update GBB flags to use altfw terminologyJoel Kitching2021-02-271-1/+1
* src/mb: Remove unused <console/console.h>Elyes HAOUAS2021-02-151-1/+0
* mainboards: Remove default CHROMEOS=yKyösti Mälkki2021-02-041-2/+0
* ACPI: Move include for <vc/google/chromeos.asl>Kyösti Mälkki2021-01-281-5/+0
* ACPI: Add top-level ASLKyösti Mälkki2021-01-271-0/+1
* arch/x86: Use wildcard for mb/smihandler.cKyösti Mälkki2021-01-241-2/+0
* mb/intel/jasperlake_rvp: do UART pad config at board-levelMichael Niewöhner2021-01-212-1/+8
* mb/intel/jasperlake_rvp: Fix building with CONFIG_CHROMEOS unsetMatt DeVillier2021-01-071-1/+1
* mb/intel/jslrvp: Modify the flash layout for fsp debug buildV Sowmya2020-12-011-24/+25
* mb/intel/jasperlake_rvp: Modify flash layout and enable CSE RW updateV Sowmya2020-11-181-4/+6
* src: Add missing 'include <console/console.h>'Elyes HAOUAS2020-11-171-0/+1
* mrc_cache: Move code for triggering memory training into mrc_cacheShelley Chen2020-11-131-1/+0
* mb/intel/jasperlake_rvp: Update Power Limit2 minimum valueSumeet R Pawnikar2020-11-091-1/+1
* mb, soc/intel: Reorganize CNVi device entries in devicetreeFurquan Shaikh2020-11-021-4/+6
* mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner2020-10-261-3/+0
* {src/mb,util/autoport}: Use macro for DSDT revisionElyes HAOUAS2020-10-131-1/+1
* mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devicesFurquan Shaikh2020-10-131-1/+1
* mb/intel/latest mainboards: Get rid of power button device in corebootSubrata Banik2020-10-132-15/+0
* mb/intel/{jslrvp,tglrvp}: Remove non-existent 'subdirs-y += ../common'Subrata Banik2020-10-081-1/+0
* soc/intel/common/block/acpi: Factor out common platform.aslSubrata Banik2020-10-051-1/+1
* mb/intel/jslrvp: Update PMC as hidden deviceMaulik V Vaghela2020-09-291-1/+1
* treewide: rename GENERIC_SPD_BIN to HAVE_SPD_BIN_IN_CBFSMichael Niewöhner2020-09-231-1/+1
* soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFNSumeet R Pawnikar2020-09-221-3/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 02:11:02 +0000