| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mb/*/*: Drop Intel Rangeley mainboards | Arthur Heymans | 2019-11-21 | 1 | -54/+0 |
| * | mb/*/*/others: Use sb/intel/common/acpi/platform.asl | Arthur Heymans | 2019-11-04 | 1 | -0/+1 |
| * | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik | 2019-11-01 | 1 | -1/+1 |
| * | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans | 2018-11-30 | 1 | -1/+1 |
| * | mb: Set coreboot as DSDT's manufacturer model ID | Elyes HAOUAS | 2018-11-23 | 1 | -2/+3 |
| * | ACPI: Fix DSDT's revision field | Elyes HAOUAS | 2018-11-21 | 1 | -1/+1 |
| * | intel/fsp_rangeley: change non-existent config options to #defines | Martin Roth | 2015-12-06 | 1 | -0/+3 |
| * | mainboard/intel: Add Little Plains | Marcin Wojciechowski | 2015-11-30 | 1 | -0/+49 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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