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path: root/src/mainboard/intel/saddlebrook/devicetree.cb
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* mb/intel/saddlebrook: Make use of the chipset devicetreeFelix Singer2023-11-131-46/+21
* mb/intel/skylake/devicetree: Use comma separated list for arraysFelix Singer2023-10-271-25/+29
* devicetrees: Remove trailing backslash from multiline valuesFelix Singer2023-10-251-21/+21
* mb/*: Remove lapic from devicetreeArthur Heymans2023-01-301-3/+1
* soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by defaultFelix Singer2021-08-281-5/+0
* skylake DT/HALO mainboards: Drop `SaGv` settingAngel Pons2021-05-071-2/+0
* soc/intel/skylake: Clean up SD GPIO handlingAngel Pons2021-03-011-1/+1
* soc/intel/{skl,cnl}: replace PM ACPI timer dt option by KconfigMichael Niewöhner2020-11-131-1/+0
* mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner2020-10-261-3/+0
* soc/intel/skylake: Enable SDXC depending on devicetree configurationFelix Singer2020-08-081-1/+0
* soc/intel/skylake: Enable thermal subsystem depending on devicetreeFelix Singer2020-08-071-1/+1
* soc/intel/skylake: Enable HDA depending on devicetree configurationFelix Singer2020-07-291-1/+0
* soc/intel/skylake: Enable HECI3 depending on devicetree configurationFelix Singer2020-07-291-1/+0
* soc/intel/skylake: Enable eMMC depending on devicetree configurationFelix Singer2020-07-291-1/+0
* soc/intel/skylake: Enable SMBus depending on devicetree configurationFelix Singer2020-07-291-1/+0
* soc/intel/skylake: Enable LAN depending on devicetree configurationFelix Singer2020-07-291-2/+0
* soc/intel/skylake: Enable SATA depending on devicetree configurationFelix Singer2020-07-291-1/+0
* skylake boards: Factor out copy-pasted PIRQ routesAngel Pons2020-07-261-9/+0
* mb/intel/saddlebrook/devicetree.cb: Use PCH_IRQ* macrosAngel Pons2020-07-261-8/+8
* mb/intel/saddlebrook: Remove duplicated PmTimerDisabledAngel Pons2020-05-271-2/+0
* skylake: update processor power limits configurationSumeet R Pawnikar2020-05-181-1/+3
* mainboard/*/*/*.cb: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* mainboard/[g-p]*: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* mb/intel/{saddlebrook,kunimitsu}: Add macro for SaGv configPraveen Hodagatta Pranesh2020-03-101-1/+1
* mb/**/devicetree.cb: Remove untrue commentsAngel Pons2020-01-101-1/+0
* mb/intel/saddlebrook: Enable Chipset_lockdown coreboot configPraveen Hodagatta Pranesh2019-11-011-0/+5
* mb/intel/saddlebrook: migrate to FSP 2.0Michael Niewöhner2019-10-261-66/+54
* {mb,soc/intel/skylake}: remove unused InternalGfxMaxim Polyakov2019-04-061-1/+0
* soc/intel/common: Remove common chip config use_fsp_mp_initSubrata Banik2019-03-241-5/+0
* soc/intel/skylake: Unify serial IRQ optionsNico Huber2019-03-011-3/+1
* soc/intel/skylake: Use real common code for VMX initNico Huber2019-02-181-2/+0
* soc/intel/common/block/cpu: Add option to skip coreboot AP initSubrata Banik2018-06-221-1/+3
* src: Get rid of unneeded whitespaceElyes HAOUAS2018-06-141-12/+12
* soc/intel/skylake: Add option to skip coreboot MP initSubrata Banik2018-06-051-1/+2
* soc/intel/skylake: Limit xDCI feature when VBOOT is enabledDuncan Laurie2018-03-281-1/+0
* mainboard/intel/saddlebrook: add support for Saddle BrookTeo Boon Tiong2017-12-191-0/+303
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