coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	{mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype	Subrata Banik	2022-03-15	1	-3/+1
*	soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver	Furquan Shaikh	2021-01-25	1	-5/+4
*	src: Remove unused '#include <cbfs.h>'	Elyes HAOUAS	2020-06-02	1	-1/+0
*	src: Remove unused 'include <string.h>'	Elyes HAOUAS	2020-05-18	1	-1/+0
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons	2020-04-06	1	-13/+2
*	soc/intel/tigerlake: Reorganize memory initialization support	Furquan Shaikh	2020-04-02	1	-4/+5
*	soc/intel/tigerlake: Remove Jasper Lake SoC references	Aamir Bohra	2020-04-01	1	-1/+1
*	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi	2020-03-18	1	-1/+0
*	mb/intel/tglrvp: Add memory config for Tiger Lake UP4	Srinidhi N Kaushik	2020-03-09	1	-3/+6
*	mb/intel/tglrvp: add Tiger Lake memory initialization support	Srinidhi N Kaushik	2020-02-26	1	-3/+47
*	mb/intel/tglrvp: Add initial mainboard code	Ravi Sarawadi	2020-01-14	1	-0/+22